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I have this makefile (I cut out the irrelevant parts):

CC = gcc
EXEC = mtm_cm
LIB = -L. -lmtm
DEBUG = -g
CFLAGS = -std=c99 -Wall -Werror -pedantic-errors -DNDEBUG $(DEBUG)
OBJS = command_parser.o course_manager.o grade_data.o student.o \
 grade_sheet_data.o print_utilities.o semester.o string_utilities.o

$(EXEC): $(OBJS) main.o
    $(CC) $(DEBUG) $(OBJS) main.o $(LIB) -o $@

... here the $(OBJS) targets are found ...

tests: $(OBJS) student_test grade_data_test

grade_data_test: tests/grade_data_test.o
    $(CC) $(DEBUG) $(OBJS) tests/$@.o $(LIB) -o $@

student_test: tests/student_test.o
    $(CC) $(DEBUG) $(OBJS) tests/$@.o $(LIB) -o $@

tests/student_test.o: tests/student_test.c tests/new_test_utilities.h \
 student.h list.h grade_sheet_data.h

tests/grade_data_test.o: tests/grade_data_test.c tests/new_test_utilities.h \
 grade_data.h grade_sheet_data.h list.h

Everything works normally, except the grade_data part.
That is, if I call make, the executable mtm_cm is created, and if I call make tests, then student_test is created, but not grade_data_test.
Instead, I get an error:

... former successful compilations ...
gcc -g command_parser.o course_manager.o grade_data.o student.o grade_sheet_data.o print_utilities.o semester.o string_utilities.o tests/grade_data_test.o -L. -lmtm -o grade_data_test
gcc: tests/grade_data_test.o: No such file or directory

But it did not merely skip the dependency of the target grade_data_test. Instead, let us run make tests/grade_data_test.o --debug=v, and get the output:

...
Finished prerequisites of target file `tests/grade_data_test.o'.
Must remake target `tests/grade_data_test.o'.
Successfully remade target file `tests/grade_data_test.o'.
make: `tests/grade_data_test.o' is up to date.

But the file does not exist. The directories have enough permission, and I don't have directories with the same name as files.

Can you help me find out the solution?

Antonio AN
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    Is there any whitespace on the line immediately following the `tests/grade_data_test.o` rule? – aschepler Dec 31 '17 at 01:56
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    I suspect you need a compilation command line on the line after the last line shown in the `makefile`. – Jonathan Leffler Dec 31 '17 at 03:05
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    @aschepler indeed that was the problem! Now it works, thank you! – Antonio AN Dec 31 '17 at 08:11
  • a question: Why did you not include the `main.o` as one of the object files? – user3629249 Dec 31 '17 at 23:29
  • what is the `A` line after the definition of the macro `CFLAGS`? – user3629249 Dec 31 '17 at 23:34
  • How are you invoking this make file? Normally there is a `all` (phony) target that would list the executable files as dependencies, Strongly suggest using the `gcc` compiler to generate the 'dependency' files then `#include` those dependency files then your actual compile recipe (which you did not post, so we have to assure your trying to use the default) would include the appropriate dependency file. Similar to: `%.o:%.c %.d` followed by the actual compile statement. – user3629249 Dec 31 '17 at 23:40
  • to avoid having the macros evaluated more that once. define them using `:=` rather that `=` – user3629249 Dec 31 '17 at 23:44
  • regarding: `... here the $(OBJS) targets are found ...` will cause the make utility to fail. Suggest prefixing the line with: `#` as that is the comment marker used by `make` – user3629249 Dec 31 '17 at 23:46
  • @user3629249 Because I use the same macro for compiling other programs with a main() function, so I must exclude the main.o in order to compile them. – Antonio AN Jan 03 '18 at 14:21
  • Thank you, people, for your advice. The problem was solved, all good, thanks to aschepler, above. – Antonio AN Jan 03 '18 at 14:22

0 Answers0