Intel PEBS sample context

Question

I am using Linux perf tool to monitor system-wide (exclude_kernel == 0) PEBS samples. I was wondering whether PEBS sample can occur at interrupt context (i.e., during an interrupt is being served by the interrupt handler). If it is possible, is there any way to determine the context (e.g, process context, interrupt context) of the PEBS sample (i.e., register bits)?

Answer 1

PEBS sampling never occurs when an interrupt is being serviced.

PEBS uses the above buffering mechanism to store its records. You can clearly see all the PEBS relevant fields like PEBS buffer base and PEBS interrupt threshold etc. PEBS interrupts occur when the PEBS buffer index matches the PEBS interrupt threshold specified.

The PEBS interrupt handler will reset the PEBS Buffer Index back to the start of the PEBS buffer base. If PEBS sampling were to continue, then PEBS would also try to access the DS buffer to increment the PEBS Buffer Index. So both the PEBS Interrupt and PEBS itself will try to write to the same DS save area. This obviously points to a race condition between the PEBS interrupt handler and PEBS module.

To avoid this race condition, it is required to disable PEBS sampling (by disabling flags in the IA32_PEBS_ENABLE msr register). Also all the event counters must be disabled as well by the interrupt handler. This is the proof in the kernel.

However, if the PEBS interrupts cause too much throttling on the CPU, you can have a PERF_RECORD_THROTTLE event, but this is of course, not a PEBS_SAMPLE event but rather a PERF_RECORD event.