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If I have an ARM Thumb 2 instruction stream that looks like the following:

itt NZ
mov r1,r2
it MI
mov r3,r4

The IT block of the first IT instruction contains mov and a second it. Is this sequence allowable, or is it undefined behavior?

John Källén
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    lack of research effort: [ARM's documentation seems clear](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cjabicci.html) *The following instructions are not permitted in an IT block:* `IT` is the first entry. This came up as my first google hit for `arm itt`. – Peter Cordes Nov 18 '17 at 05:51
  • A little understanding of the implementation; 4 control register bits gives you a strong hit that a global resource won't nest. If the conditions are the same, you can just merge them. Unfortunately, it looks like your are doing `if x > 0 return 1; if x == 0 return 0 else return -1;` logic which is okay on ARM , but not Thumb2. Just convert `itt nz` to `it nz` and you are fine with an extra op-code. – artless noise Nov 18 '17 at 17:32

1 Answers1

5

An IT block must not contain another IT instruction. The result of your code is unpredictable.

fuz
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