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In a VHDL assignment, I have to make an ALU which outputs the result of the subtraction and two's complement and some other operations on 16bit inputs. In a way that the rtl code is compared with the functional one.

In the functional code, I have used arithmetic operations like "+", "-" and ..., but in the rtl, I have used structural VHDL. That is why I have to be accurate so the results of these codes show the same output. I don't know what parts of the codes might be useful to share.

I am working on a vhdl code that subtracts two "signed" numbers (signed in two's complement format) in the structural form. Normally for subtracting two unsigned numbers, we change the second one to two's complement and add the numbers.

But, now that we have signed numbers, say we want to subtract two 16 bit signed numbers that the last MSB is the sign bit. How does two's complement work here? (Looking at here), if I want to have a - b (a and b are signed numbers) I should have:

a + (two's complement b)

or

a + (not b)?

(a and b are signed in two's complement format)

syzd
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    To negate using twos complement is invert and add one yes? you invert the second operand, and you invert the carry in. and that is that. The other thing to care about is the carry out, do you want that to be borrow or not borrow? you may or may not choose to invert the carry out if you have carry bit you store in a flag register. the beauty of twos complement is the numbers all just work out. Take all the combinations of three bit operands, do unsigned addition do signed addition, notice how the bit patterns work without the logic having to know the difference, then... – old_timer Sep 29 '17 at 22:32
  • from there a - b = a + (-b) just works. for addition and subtraction signed vs unsigned is relative only to the programmer the logic doesn know care about the bit patterns. for the same reason nbit = nbit * nbit multiplication doesnt know or care it is when you do nbits*2 = nbit * nbit that you have to sign extend and then it matters (for multiplication). – old_timer Sep 29 '17 at 22:32
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    Can you simply use subtraction? The unary negation operator will also perform two's complement inversion + 1 like binary subtraction (see package numeric_std [numeric_std.vhdl](http://standards.ieee.org/downloads/1076/1076.2-1996/numeric_std.vhdl) and [numeric_std-body.vhdl](http://standards.ieee.org/downloads/1076/1076.2-1996/numeric_std-body.vhdl)Id: **A.2** and Id: **A.10**). –  Sep 30 '17 at 03:05
  • Please read [my answer to your previous question](https://stackoverflow.com/questions/46375014/vhdl-typecast-signed-to-std-logic-vector/46421972#46421972) better, because you made a mistake copying it. In two's complement, a - b = a + not(b) **+ 1**. – JHBonarius Sep 30 '17 at 06:06
  • By the way, "two's complement" is the name of a representation format, not an operation. – JHBonarius Sep 30 '17 at 08:36

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