3

I am trying to write a program that contains a large list(about 4.8kbytes). The code is in assembly, but with an even larger data table (about 5.4kbytes).

Jason Ingle
  • 31
  • 2
  • "4kbytes of program space and 256kbytes of data space" - hardly. – too honest for this site Sep 12 '17 at 21:31
  • 2700 lines of DW = 5400B, so there's some catch. Either some lines are not `DW`, or that table is going into data memory, not code, or there's some `org` directive rewriting older data, or there are not 2700 lines of them... check the resulting binary and linking map, where are the addresses of stuff and sections. I wouldn't worry about recreating the data structure in C, but making the actual code small may turn out to be difficult. – Ped7g Sep 12 '17 at 21:31
  • 2
    We are not a tutoring service. Ask the original author. If it's working, why rewrite it at all? – too honest for this site Sep 12 '17 at 21:33
  • @Ped7g: The 256KiB RAM are clearly a typo. It is more like 256 Bytes. Even if, how would you prevent the RAM from loosing information on power-off? That#s not a PC – too honest for this site Sep 12 '17 at 21:34
  • According to [this](http://ww1.microchip.com/downloads/en/DeviceDoc/40001441F.pdf) your chip has 4K **WORDS** of code memory. And 256 **BYTES** of EEPROM, and SRAM (not KiB). If your accuracy with programming is as good as with reading data sheets, stay away from low level coding. @Olaf: by loading the binary every time from some rom/flash by firmware, but I overestimated the level of that chip at first (expected something more advanced as I met 256kB RAM on much more advanced systems, including those options of rom/flash and firmware booting sequence) – Ped7g Sep 12 '17 at 21:35
  • @Ped7g: Wow, that was a bit harsh, even for me, I suppose. Let's assume OP just made a typo. I'm more concerned the question is badly asked and way too broad as we are not a consulting service and it is clearly **his** job we are asked to do. Would you agree voting to close? – too honest for this site Sep 12 '17 at 21:38
  • @Ped7g See the 4KiB PC(!) graphic demos on the "Evoke" party. You might be surprised. For instance: https://www.youtube.com/watch?v=kBBH6BGbEgo (I'm no way affiliated with that, btw) – too honest for this site Sep 12 '17 at 21:40
  • I would agree to close it as "typographic" offtopic, because he just didn't understand what "4k words" means. Although I have to give him credit for at least realizing something is wrong somewhere, I often assume something wrong too, so yeah, was a bit harsh. But 256kB RAM a typo? You probably did recognize this is 8b chip, but otherwise it made perfect sense, I used a board with 8MiB EEPROM, 1kiB SRAM, 512kiB DRAM and 2MiB VRAM + GPU few years back (completely different thing than the chip in question, I understand now) (I did myself 256B intros ;) ) – Ped7g Sep 12 '17 at 21:43
  • @Ped7g: The PIC12 has 12 bit words for instructions. each one can alternatively store 1 byte of data as a special instruction (upper bits encode the instruction). So, with that view "4KiB" is fine. IIRC, one cannot access this area as e.g. packet data. (at least that's true on other PIC12, IDK this specific device). Welcome to one of my worlds ;-) – too honest for this site Sep 12 '17 at 21:46
  • I'm not familiar with this type of chips... so is the memory addressable by bytes or 12b words? How does `DW 0x3EE0` compile, over two memory words or top 0x3 is truncated? ... I would check assembler listing (or binary) + linker map to understand the platform. If `DW` is defining the chip words (truncated), then the original programmer used only about 2700 words from 4K available. If it gets transformed from 16b to 12b, then still 4K words = 6kiB, so 5400B table + 800B code may fit. .. thinking about it, the memory is 16b words, right? Just opcodes are 12b? Probably. – Ped7g Sep 12 '17 at 21:50
  • 1
    Check the datasheet, it is quite simple: True harvard arch with 12 bit instruction ROM/Flash. No direct path to read as data, but a special instruction to load 8 bits from the instruction code to an internal accumulator. All PIC12/14/16/18 have basically the same arch, but varying instruction widths. Actually they are more advanced state-machines than CPUs imo. But then "CPU" is not well defined. The Data-RAM and IO-registers are located as banked GP-registers. ADD/AND/etc. instructions operate on the accu and one of those registers with an 6/7/8 (depending on family) wide register address. – too honest for this site Sep 12 '17 at 21:56
  • I did indeed make a typo. I'm new to PIC programming, there is no need to demoralize someone who is already feeling overwhelmed by something that seemingly doesn't make sense. All of the lines ARE indeed DW, and there are definitely 2700 lines of them, I have carefully checked and added the linker map file. I am rewriting the code in C for my OWN learning on my OWN time. I was only hoping for some helpful insight. If I knew I'd be met with the kind of elitist, hostile response you guys have presented yourselves with, I wouldn't have posted at all. Thanks anyways. – Jason Ingle Sep 12 '17 at 21:59
  • @Olaf: thank you for summary. As I'm not planning to code for it at the moment, I will not check the datasheet thoroughly. It sounds like interesting platform, but for me the main question (why 2700 word table fits) is answered, and unfortunately I will be not coding for this. Sounds fun. But the OP should check the datasheet in detail ;) – Ped7g Sep 12 '17 at 21:59
  • 1
    @Ped7g: Ok, just check the DS: it has 14 bit words and is a bit modernised compared to the PIC12 I know. But that does not change the operation principle. That whole PIC12/14/16/18 arch is just a ead horse ridden by devs who don't know thre a re more modern (and cheaper) MCUs on the market. Well, yes, the Microchip marketing is pretty good keeping their customers. – too honest for this site Sep 12 '17 at 22:01
  • @JasonIngle: While it might have been a bit rough, the message itself is fine: that's your assignment/job. You are expected to read (and understand) the documentation and the details **before asking a specific questions**. We are not here to teach you or do your job. Even if there is a specific problem, it is a matter of respect to format your post properly and provide the necessary information, see [ask]. Said that: it depends on much more information and your question si clearly OT. – too honest for this site Sep 12 '17 at 22:04
  • 1
    Ok, so the linker script clearly says: "3620 out of 4359 program addresses used" ... your mistake is assuming the memory is addressed by bytes, while it is addressed by words, and it is 4K words big, not 4K bytes. – Ped7g Sep 12 '17 at 22:04
  • 1
    @Ped7g: I would not recommend any of the PIC family. As I wrote, the arch has been dead-horse'd for over 20 years now. There are more modern archs, even the also outdated AVR is. For a modern MCU with very low power, see MSP430, otherwise various ARM Cortex-M0(+) or -M4. If you are interested int his field, they ae all much more interesting to evaluate. – too honest for this site Sep 12 '17 at 22:10
  • Thank you everyone for your input and help, I have figured out the problem and learned a lot about the nature of this unique little device. – Jason Ingle Sep 12 '17 at 22:24

2 Answers2

3

Have a look at the memory organization of the datasheet (chapter 3), you will see that a word (an instruction) uses 14 bits instead of the 8 bit you are used to in a program. By writing not 8 bit to a word but 14 bit you have 75 percent more storage which is a big deal.

The hard part will be to create a function that is able to split up your 8 bit byte to 14 bit words. You can use structs with bitfields to do this or you can take the easy way and use the first bit of 8 words for 1 byte and so on. You will need to use special instructions to read the upper 6 bit of the word.

The easiest way would be to use only 12 of the 14 bits and split the 3th byte over the odd and even bit. The benefit of this is that your code is easy and by checking odd or even you know how to decode. Reading 14 bits is a bit more tricky this can be done using asm(INSTRUCTION NAME) or by c functions provided by microchip. (look for an application note about reading and writing to the flash memory for examples).

I don't know the nature of your data but maybe there are patterns to be found that allow compression. Some basic compression algorithms are not as hard as they might seem.

Maarten Arits
  • 170
  • 1
  • 9
2

The PIC12LF1840 device have 4K program memory words. One program memory word have 14 bits.

  • Total program memory in bytes is: 4096 * 14 bit / 8 = 7168 bytes

  • Your table is 4800 bytes long, so the rest for code is: 7168 - 4800 = 2368 bytes or 2368 * 8 / 14 = 1353 program words.

    So nothing impossible to do!

  • Check in datasheet indirect program memory addressing, section 3.6

  • Use bit addressing to extract single byte from your program memory table, because program word is 14 bit.

Community
  • 1
  • 1
GJ.
  • 10,810
  • 2
  • 45
  • 62