0

I know these two ways to make LRU algorithm miss 100%.

  1. Cyclic accesses to a data-set that is marginally larger than the cache size.

enter image description here

  1. Arbitrary bursts of accesses to an infrequently accessed data-set that pollutes the cache by replaceing the more frequently used entries.

enter image description here

Red color means cache miss.

But it has another way that "Accesses to blocks with varying access frequencies".

I don't know how to describe it with an example.

Wonter
  • 293
  • 1
  • 5
  • 15
  • How the first 2 methods are different? (according to your example) – CIsForCookies Sep 03 '17 at 15:21
  • Arbitrary bursts and varying frequencies sound more like situations where LRU will have **a high, but 100%,** miss rate. A generalisation of cyclic accesses (phrased according to the distance between accesses of the same element) is the only way to guarantee 100% misses. – Bernhard Barker Sep 03 '17 at 17:34
  • Did you get those 3 out of a textbook or something? – Bernhard Barker Sep 03 '17 at 17:56

1 Answers1

1

LRU might take into account the frequency we access the data, for example:

Data   1    1    2    2    3    4
Cache1 1(1) 1(2) 1(2) 1(2) 1(2) 1(2)
Cache2           2(1) 2(2) 2(2) 2(2)
Cache3                     3(1) 4(1)

Here is in round brackets a counter which get increased each time there is a cache hit to a corresponding block. So, since we accessed block 1 and 2 two times at the beginning, block 3 get evicted from the cache, despite it was used more recently than block 1 and 2.

So "Accesses to blocks with varying access frequencies" basically might look like this:

Data   1    1    2    2    3    4    3    4
Cache1 1(1) 1(2) 1(2) 1(2) 1(2) 1(2) 1(2) 1(2)
Cache2           2(1) 2(2) 2(2) 2(2) 2(2) 2(2)
Cache3                     3(1) 4(1) 3(1) 4(1)

So despite we use just 3 and 4, LRU still prefers to keep 1 and 2 as more frequently used.

Another example might be just like your previous examples: we should access blocks just once, so the counter never get increased, i.e.:

Data   1    2    3    4    1    2    3
Cache1 1(1) 1(1) 1(1) 4(1) 4(1) 4(1) 3(1)
Cache2      2(1) 2(1) 2(1) 1(1) 1(1) 1(1)
Cache3           3(1) 3(1) 3(1) 2(1) 2(1)

Hope that answers your question.

Andriy Berestovskyy
  • 8,059
  • 3
  • 17
  • 33
  • @Wonter it is a combination of LRU with LFU, i.e. LFRU. Since you asked about "varying access **frequencies**" in context of LRU, I thought that might be it... – Andriy Berestovskyy Sep 05 '17 at 12:27