0

As far as I know about virtually indexed virtually tagged cache, here we have a virtual address divided into page number and page offset. We use this page number to get the cache block. If there is a cache miss, we do address translation using TLB and fetch appropriate cache block from main memory. My doubt is what is the meaning of word "indexed" here ? Is it the way cache lines are addressed? And what is the meaning of virtually tagged?

Thanks.

Joe
  • 29,416
  • 12
  • 68
  • 88
Zephyr
  • 1,521
  • 3
  • 22
  • 42

2 Answers2

3

In VIVT caches, the virtual address is used for tag comparisons and indexing. In general, CPU caches have a index and a tag, which are two parts of a memory address. Index portion of the address is used to index the entry in a cache. Tag is used to to check the entry we are looking for is the same as the entry that is being cached. Indexing and tagging can be done using either physical address or virtual addresses, or a combination of both. VIPT - Virtually Indexed Physically Tagged

To answer your question, indexing means to fetch the cache entry that is represented by index bits. Virtually tagged means, tag bits that are used for comparison is from virtual addresses.

Isuru H
  • 1,191
  • 1
  • 8
  • 11
  • Thanks for your reply. Can you tell me which part of the virtual address contains the tag ? Is it the page no or page offset? – Zephyr Jul 07 '17 at 14:46
  • These are different things. Page no and page offset is to access page table and physical address information. Tag bits are determined by the size of the index bits which in turn is determined by the size of the cache. – Isuru H Jul 08 '17 at 13:28
0

Index here means the index of each entry in the cache. For an instance, the most popular choice is Virtually indexed and Physically tagged. Given a virtual address, we look up in TLB and cache in parallel. If the cache is virtually indexed, the virtual address can be used to quickly locate the entries in the cache. In each entry, there are index, tag, and data. By comparing tag with the physical address, we can see if this is the entry we need.

The advantage of this is that we can access TLB and cache in parallel.

Computer Architecture, A Quantitative Approach is recommended for further knowledge.

Hope this helps those reading this question.

DAVID Zuo
  • 21
  • 1