ADC for PIC18F47J53 code unexpected behavior when passing by value

Question

I am implementing the ADC for PIC18F47J53 using MPLAB v3.51.

Why is the value of the variable CH in the main function not passed correctly to the function ADC_Read with the argument channel?

unsigned int ADC_Read(unsigned char channel);
void ADC_Initialize();

#pragma config ADCSEL = BIT12                  //12 bit conversion mode enabled

#define ANCON_AiBi4         ANCON0bits.PCFG1   // Analog Input channels

int main(int argc, char** argv) 
{
    unsigned int j=0;
    unsigned char CH; 

    ADC_Initialize();

    while (1) 
    {
        CH = 1;
        j = ADC_Read(CH); //store the result of adc in j.    
    }  
    return (0);
}


void ADC_Initialize()
{
     ADCON0 = 0x01;   //00000001      ADC ON, AVss, AVdd 
     ADCON1 = 0xBD;   //10111101      R justified, Normal op, 20TAD, FOSC/16
}


/* Select the analog channel */
unsigned int ADC_Read(unsigned char channel)
{
    ADCON0 &= 0xC3;                     //11000011    Clearing the Channel Selection Bits
    ADCON0 |= channel<<2;               //Setting the required Bits
    ADCON0bits.GO_DONE = 1;
    while(ADCON0bits.GO_DONE);
    return ((ADRESH * 256) + ADRESL);   //Returns Result
}

Generated assembly code

!unsigned int ADC_Read(volatile unsigned char channel)
0xB0: MOVFF FSR2, POSTINC1
0xB2: NOP
0xB4: MOVFF FSR1, FSR2
0xB6: NOP
0xB8: SUBFSR 2, 0x2
!{
!    ADCON0 &= 0xC3;                     //11000011    Clearing the Channel Selection Bits
0xBA: MOVLW 0xC3
0xBC: ANDWF ADCON0, F, ACCESS
!    ADCON0 |= channel<<2;               //Setting the required Bits
0xBE: MOVF [0x0], W, ACCESS
0xC0: MULLW 0x4
0xC2: MOVF PROD, W, ACCESS
0xC4: IORWF ADCON0, F, ACCESS
!    ADCON0bits.GO_DONE = 1;
0xC6: BSF ADCON0, 1, ACCESS
!    while(ADCON0bits.GO_DONE);
0xC8: BTFSC ADCON0, 1, ACCESS
0xCA: BRA 0xC8
!    return ((ADRESH * 256) + ADRESL);   //Returns Result
0xCC: MOVF ADRESH, W, ACCESS
0xCE: MOVLB 0x0
0xD0: MOVWF 0xC, BANKED
0xD2: CLRF 0xD, BANKED
0xD4: MOVFF 0xC, 0xD
0xD6: NOP
0xD8: MOVLB 0x0
0xDA: CLRF 0xC, BANKED
0xDC: MOVF ADRES, W, ACCESS
0xDE: MOVLB 0x0
0xE0: ADDWF 0xC, W, BANKED
0xE2: MOVLB 0x0
0xE4: MOVWF __tmp_0, BANKED
0xE6: MOVLW 0x0
0xE8: MOVLB 0x0
0xEA: ADDWFC 0xD, W, BANKED
0xEC: MOVLB 0x0
0xEE: MOVWF 0xB, BANKED
0xF0: MOVFF __tmp_0, PROD
0xF2: NOP
0xF4: MOVFF 0xB, PRODH
0xF6: NOP
0xF8: BRA 0xFA
!}
0xFA: SUBFSR 1, 0x1
0xFC: MOVFF INDF1, FSR2
0xFE: NOP
0x100: RETURN 0

Configuration Bits source code

// PIC18F47J53 Configuration Bit Settings

// 'C' source line config statements

#include <p18F47J53.h>

// CONFIG1L
#pragma config WDTEN = ON       // Watchdog Timer (Enabled)
#pragma config PLLDIV = 1       // PLL Prescaler Selection (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CFGPLLEN = OFF   // PLL Enable Configuration Bit (PLL Disabled)
#pragma config STVREN = ON      // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = ON       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config CPUDIV = OSC1    // CPU System Clock Postscaler (No CPU system clock divide)
#pragma config CP0 = OFF        // Code Protect (Program memory is not code-protected)

// CONFIG2L
#pragma config OSC = INTOSC     // Oscillator (INTOSC)
#pragma config SOSCSEL = HIGH   // T1OSC/SOSC Power Selection Bits (High Power T1OSC/SOSC circuit selected)
#pragma config CLKOEC = ON      // EC Clock Out Enable Bit  (CLKO output enabled on the RA6 pin)
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON        // Internal External Oscillator Switch Over Mode (Enabled)

// CONFIG2H
#pragma config WDTPS = 32768    // Watchdog Postscaler (1:32768)

// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = ON     // Deep Sleep BOR (Enabled)
#pragma config DSWDTEN = ON     // Deep Sleep Watchdog Timer (Enabled)
#pragma config DSWDTPS = G2     // Deep Sleep Watchdog Postscaler (1:2,147,483,648 (25.7 days))

// CONFIG3H
#pragma config IOL1WAY = ON     // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config ADCSEL = BIT12   // ADC 10 or 12 Bit Select (12 - Bit ADC Enabled)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)

// CONFIG4L
#pragma config WPFP = PAGE_127  // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 127)
#pragma config WPCFG = OFF      // Write/Erase Protect Configuration Region  (Configuration Words page not erase/write-protected)

// CONFIG4H
#pragma config WPDIS = OFF      // Write Protect Disable bit (WPFP<6:0>/WPEND region ignored)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select bit (valid when WPDIS = 0) (Pages WPFP<6:0> through Configuration Words erase/write protected)
#pragma config LS48MHZ = SYS48X8// Low Speed USB mode with 48 MHz system clock bit (System clock at 48 MHz USB CLKEN divide-by is set to 8)

MPLAB variables view

ADCON0 and channel unexpected values

Answer 1

It was a stack error. However, it is working fine now after I enabled the “multi-bank stack model”. Thanks guys