What is basic purpose of a layered testbench for verification when we can write all functionality in simple one program block. I know reusability is one purpose but what apart from it makes unique.
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2I struggle to imagine how how someone can fully test a _simple_ 4-stage-pipeline 16-bit CPU or a _simple_ 4-port router with _one simple_ program block? Even with several _simple_ tests, it would not be long before duplicating code between tests. Putting the duplicate code in a common library (or include file) is effectively the start of a rudimentary layered testbench. But if I don't, any protocol/design change would be a massive headache. And how would I port my module level TB checkers to top-chip TB? – Greg Jun 06 '17 at 17:28
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It depends on how big is your design. If your design is very small, one program block probably works fine. (BTW, I strongly discourage the use of program block, use a top module instead. There are known issues in thread scheduling with program block in big 3 EDA's simulators)
However if you are design is huge and you have to test it by divide any conquer, then you have to build your testbench in layers that matches the division of labor. If you don't layer your testbench probably, you will not able to reuse your block level code in the system level environment.

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