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I have 2 cores which have shared memory.

My question is , how can i write a code which his output will be a single binary/hex file, and it will run on both of the cores.

My main() is running on CORE 1 and it works, i would like to operate the 2nd CORE and calculate some math functions and write the result to the shared memory.

I'm working with CCS IDE. my example looks like that :

#pragma DATA_SECTION(globalvar,".core2_data");
uint16_t globalvar=0xffff;

#pragma CODE_SECTION(test_multiply,".core2_code")
void test_multiply(void)
{

    globalvar = 3*2;
    while(1);
}
Main()
{
core2_startup_sequence();
...
...
...

}

The startup file in my project is configured for CORE1 , and i configured the RAM sections in the linker file for both cores. Is my approach correct or not at all?

The results of my attempts at the moment are:

Success in starting the 2nd CORE with it's core2_startup_sequence(); but I could not write the results of the calculation to the shared memory, it seems that the 2nd core doesn't run the instructions from the "#pragma"s. Thank you.

A.Boy
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  • Which architecture/CPU are you using? Are you using any RTOS? – OlivierM Jun 01 '17 at 09:21
  • yes , i'm using RTOS, FreeRTOS. – A.Boy Jun 01 '17 at 10:43
  • please post the linker command file. So we can see how your assigning the cores. What is the 'core2' expected to be doing when its' code is not being run? What is the 'core1' expected to be doing while 'core2' is running some function? – user3629249 Jun 01 '17 at 15:30
  • from my experience with the TI DSPs, there is only 1 memory map, and each core can access any of the memory. Now, multiple processes running can have shared memory. Is that what you really mean? – user3629249 Jun 01 '17 at 15:33
  • In my linker command file i have separate RAM space for each core which is divided for DATA space and CODE space for each one of them. And the "pragma"s above are pointing to this data/code. The main function is running as supposed to for the 1st core but the 2nd core for some reason is no running the above instructions. i wan't them to run in parallel. – A.Boy Jun 01 '17 at 15:57
  • Maybe my problem is that i don't have a boot sequence for the 2nd core (ARM M4), do i need a boot sequence for the 2nd core ? if so where do i write it , in the code ? The boot sequence for the primary core is written in the startup file in OS. – A.Boy Jun 02 '17 at 16:30

0 Answers0