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Is there a way to specify options to VCS when using the PeekPokeTester? In particular, I would like to: 1) Enable System Verilog for black box code 2) Control the macro defines to disable the random number-based initialization. (I want to see initialization issues as Xs.)

Steve Burns
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The answer is currently and unfortunately no. In determining this to be the answer I think making this possible would be pretty simple. I have created an issue chisel testers issues 148. Let me know what the priority is

Chick Markley
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