Boolean algebra minimization using NAND only

Question

Can anyone explain how the boolean expression is simplified in the last step?

Original Question:

Realize X=a´b´d´+b´cd´+a´b´c+a´cd´+abc´+abd+bc´d+ac´d using minimum number of 2-input NAND gates. Assume that double-rail inputs are available. No gate may be used as a NOT.

Can you demonstrate *any* effort at doing the simplification yourself? — Scott Hunter, Apr 16 '17 at 11:48
Well I have been. Trying to figure out for a while .. made number of attempts but failed. — Ameer Hamza, Apr 16 '17 at 12:01
You have 16 possible inputs. For how many of these inputs is the output TRUE? And for which of these inputs? That would be a start. — gnasher729, Apr 16 '17 at 12:08

score 0 · Answer 1 · answered Apr 16 '17 at 13:06

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So Finally I figured out the answer/logic behind the answer with the help of a friend.

Method 1:

Use distributive law followed by consensus theorem.

Method 2:

Use to simplified version of above:

xy + ~xz = (x+z)(~x + y)

answered Apr 16 '17 at 13:06

Ameer Hamza

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This does not answer your original question. Where is the expression solely composed of NAND2 gates? Note that the eight terms cannot be simplified further. Draw a Karnaugh map to convince yourselve that the 3-variable terms cannot be merged to form terms with fewer inputs. – Axel Kemper Apr 17 '17 at 07:58

score 0 · Answer 2 · edited Oct 27 '18 at 14:12

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[{(a+b) ⊕ (c+d')}' {(a'+b') ⊕ (c'+d)}']'

if only we could implement XNOR without using NAND as NOT..... sad

edited Oct 27 '18 at 14:12

Suraj Rao

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answered Oct 27 '18 at 14:06

Muhammad Abdullah

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Boolean algebra minimization using NAND only

2 Answers2