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Does the x86 CPUID instruction alter the flags register? I don't have access to a debugger, unfortunately.

I'm writing some GCC assembler code inside a D program, and I was wondering whether to put "cc" in the clobbers, just to be on the safe side.

Cecil Ward
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    According to [this manual](http://ref.x86asm.net/geek64.html) it doesn't. – fuz Feb 24 '17 at 19:26
  • I can't see any _explicit_ mention of it by googling. – Cecil Ward Feb 24 '17 at 19:28
  • Basically, updating the flags is a side effect and should be listed in the instruction pseudo code. If it is absent there, flags aren't set. – fuz Feb 24 '17 at 19:36
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    Not to mention the "_Flags Affected None."_ part in the official intel instruction set reference. – Jester Feb 24 '17 at 20:14
  • A follow up question: why do you care? – zx485 Feb 24 '17 at 20:25
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    You don't ever need to put `"cc"` in the clobbers of an x86 inline assembly statement because GCC assumes it regardless. Note that this is not necessarily true of other CPU architectures. – Ross Ridge Feb 24 '17 at 23:44
  • I just assumed it was good practice to put cc in when the flags are indeed altered, in order to allow the compiler to have the possibility of generating better code in rare cases, because it does not have to make pessimistic assumptions. And I've seen this usage of cc in x86 GCC tutorials. – Cecil Ward Feb 25 '17 at 07:33
  • Ross, that's good to know. Do you have a source for that? Might this change? – Cecil Ward Feb 25 '17 at 07:34
  • Th [GCC docs](https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html) describe "cc" this way _On other machines, condition code handling is different, and specifying "cc" has no effect. But it is valid no matter what the target._ What it doesn't explicitly say is the x86 is one of the machines where it has no effect. For backwards compatibility this likely won't change. I think it is good form to use the "cc" clobber on x86 since it makes the inline assembly more self documenting and if somehow `cc` processing changed then you are already ahead of the curve. – Michael Petch Feb 26 '17 at 04:38
  • Michael, couldn't agree more. My thinking exactly. – Cecil Ward Feb 26 '17 at 06:06
  • Btw, another q: do we know that CPUID clears the high 32-bits of rax etc in 64-bit mode? It would seem to need to be that way to follow the general spirit of the AMD64 architecture of always zero-extending everything for free. I just don't have the tools to check this at the moment. – Cecil Ward Feb 26 '17 at 06:09

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As per http://www.felixcloutier.com/x86/CPUID.html

Flags Affected

None.

There is one link between CPUID and eflags though.
A x86 CPU only has support for CPUID if ...

The ID flag (bit 21) in the EFLAGS register indicates support for the CPUID instruction. If a software procedure can set and clear this flag, the processor executing the procedure supports the CPUID instruction.

Johan
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