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Is there a Divide by zero exception on M0+ devices?

I know Cortex M3 and M4 devices have this.

1 Answers1

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Cortex-M0+ is ARMv6-M which does not include a divide instruction, so there will be no hardware exception for that. Since division would necessarily be a software operation, it would be for the software implementation for trap divide-by-zero. The behaviour will therefore be down to your compiler; for C and C++ at least it is undefined behaviour.

Clifford
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    @LPs : On M3, 4 and 7 *integer divide-by-zero* generates a UsageFault exception, Ref.: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/ch02s04s01.html – Clifford Jan 26 '17 at 12:15
  • @LPs It doesn't have a FPU, but still offers `SDIV` and `UDIV` divide instructions. – Colin Jan 26 '17 at 12:18
  • @Clifford Yes, my bad. – LPs Jan 26 '17 at 13:10