Enable and Distribute IRQs in Linux

Question

I am using imx6 sabrelite board in which Linux OS runs on core0 and RTOS on core1. I have configured GIC interrupt registers in RTOS but Linux OS overwrites it. I need to enable IRQs 88,142,143,150 and distribute it to core 1(RTOS) in linux source code. I have gone through the irq_gic.c file but couldn't get an idea to proceed further.

i have tried cat /proc/interrupts in serial console and i couldn't see the above IRQ numbers. is that indicates the above interrupts are disabled in Linux?

How to enable and distribute interrupts in Linux source code?

Your suggestions are welcome!

Thanks in advance.

score 0 · Answer 1 · answered Jan 25 '17 at 15:57

ARM SMP cores are often associated with a GIC, providing per processor interrupts (PPI), shared processor interrupts (SPI) and software generated interrupts (SGI).

GIC driver called from device tree file. You can check the entry for same in your .dtsi file (arch/arm/boot/dts/imx6qdl.dtsi)

intc: interrupt-controller@0x00a01000 {
  compatible = "arm,cortex-a9-gic";
  #interrupt-cells = <3>;
  interrupt-controller;
  reg = <0x00a01000 0x1000>,
       <0x00a00100 0x100>;
  interrupt-parent = <&intc>;
};

You can make the entry for your driver in the device tree:

my_driver my_driver@0x0{
    compatible = "eeti,egalax_ts";
    interrupt-parent = <&intc>;
    interrupts = <X Y Z>
};

X: 0 for SPI interrupts, 1 for PPI.

Y: interrupt number for the interrupt type.

Z: trigger type and level flags

You need to enable the interrupts(which you mentioned above) from your driver through function:

request_irq(IRQ_NUM, my_interrupt_handler,IRQ_FLAG, "my_driver", my_dev);

Once your interrupt will be register then you can see the entry for the same in cat /proc/interrupts.

To distribute your interrupt to core 0 then you have to bind it to core 0.

[root@maverick]# echo 1 > /proc/irq/24/smp_affinity

You can varify the same with

[root@maverick]# cat /proc/irq/24/smp_affinity
00000001

For more understanding about GIC have a look into you mainline kernel Documentation/devicetree/bindings/arm/gic.txt

Hi vinod, thanks for the reply. i have restricted Linux OS to one core using maxcpus=1 option. so i can't use smp_affinity option here. my idea is to configure GIC distributor interface and target registers in irq_gic.c to map to core 1. But i am not sure where to include my changes. Do you have any idea? — saravanan k, Jan 25 '17 at 16:53
Hi Saravanan, I understood. I am not sure about it. But I think you can try in the gic_notifier() function or gic_init_bases() function. Can you pls try once and let me know the result. — vinod maverick, Jan 26 '17 at 15:12

Enable and Distribute IRQs in Linux

1 Answers1