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An excerpt from intel development documentation volume 3 section 9

The first instruction that is fetched and executed following a hardware reset is located at physical address FFFFFFF0H.
This address is 16 bytes below the processor’s uppermost physical address.
The EPROM containing the software-initialization code must be located at this address.
The address FFFFFFF0H is beyond the 1-MByte addressable range of the processor while in real-address mode.

The processor is initialized to this starting address as follows.
The CS register has two parts: the visible segment selector part and the hidden base address part.
In real-address mode, the base address is normally formed by shifting the 16-bit segment selector value 4 bits to the left to produce a 20-bit base address. However, during a hardware reset, the segment selector in the CS register is loaded with F000H and the base address is loaded with FFFF0000H. The starting address is thus formed by adding the base address to the value in the EIP register (that is, FFFF0000 + FFF0H = FFFFFFF0H).

My question is why does it use the word bytes here when it seems only makes sense for bits. Assuming the CPU's physical limit is 0xFFFFFFFF then 0xFFFFFFF0 is 16 bits away from that limit, not bytes. Now if Intel flash has to contain single-byte values per address mapped to the top there, then I guess we can call 16 bits, bytes?

Margaret Bloom
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marshal craft
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    The CPU does not have *bit* addressing, the address is a byte address, so that is 16 *bytes* not bits as Intel doc says. – Weather Vane Dec 23 '16 at 17:29
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    @WeatherVane has it. Maybe your hex arithmetic needs a brush-up. Including `0xFFFFFFF0`, there are 16 hex values less than or equal to `0xFFFFFFFF`. Each value corresponds to 1 byte. Hence, 16 bytes... – Gene Dec 23 '16 at 17:54
  • @Gene Might be he has edited his comment already in accordance to yours, but how does what you say contradict what WeatherVane says? After all, you both agree that 16 **bytes** are correct here. – cadaniluk Dec 23 '16 at 20:04
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    @Downvoter I'm not contradicting him at all. I said "Weathervane has it" as my first three words. I'm only speculating that OP's problem is hex arithmetic rather than bits vs bytes. – Gene Dec 23 '16 at 20:48
  • @Gene Then I'm sorry, I thought you addressed WeatherVane, questioning that the CPU has byte addressing as in "The CPU does not have bit addressing, **has it**?" and you just misplaced a dot instead of a question mark. I thought your whole comment was for WeatherVane. How interpretations can differ. – cadaniluk Dec 23 '16 at 20:52
  • @Downvoter my comment was posted and typo corrected a half hour before Gene commented, so I could not have corrected it to fit the comment from Gene. – Weather Vane Dec 23 '16 at 20:53
  • I have not edited the question. But bit be replaced with address places in the question. I would additionally make sense to say the address is half of a byte below. But in that context it certainly isn't a full byte below. Yet in a different context when every single bit is a byte then, pedantically yet, no? – marshal craft Dec 23 '16 at 20:55

1 Answers1

9

From Intel® 64 and IA-32 architectures software developer's manual volume 1: Basic architecture, section 1.3.4 on page 30:

The processor uses byte addressing. This means memory is organized and accessed as a sequence of bytes. Whether one or more bytes are being accessed, a byte address is used to locate the byte or bytes memory.

Basically, the byte is the smallest addressable unit in memory. To determine the value of a single bit, one would need to fetch the whole byte, which contains its value.

The difference between 0xFFFFFFFF and 0xFFFFFFF0 is 0x0F or 15 in decimal. When we include the byte at 0xFFFFFFF0 in the calculation, it's 16. Memory is byte-addressable, so it's "16 bytes below the processor’s uppermost physical address."

Frankly, I don't know how you arrived at those 16 bits. 16 bits can be represented by four hexadecimal digits (one hex digit corresponds to one nibble, i.e., 4 bits) and nowhere in your citation can I see any relation to any of this.

cadaniluk
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  • You are correct it would be 4 bits however there are 16 more address. – marshal craft Dec 23 '16 at 20:46
  • Unrelated, I assume that memory address do not address single bits. So memory address 0x0 would have a single bit but rather 8 bits or 16 bits or more. – marshal craft Dec 23 '16 at 20:50
  • I don't know how to explain it, other than I guess it was a miss understanding of wordage. You could say **the address is half a byte below...** and that would make sense, no? – marshal craft Dec 23 '16 at 20:52
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    @marshalcraft A memory address always addresses a byte. The number of bits in a byte is commonly eight, but may differ, depending on the actual implementation. – cadaniluk Dec 23 '16 at 20:53
  • I did not know that, a memory address always addresses a byte. Is that intel or everything. Also looking at documentation you linked. – marshal craft Dec 23 '16 at 20:56
  • @marshalcraft Regarding your second comment... technically, no. :-) I understand what you are trying to say because I know the context and others might get the meaning as well, but an address just cannot be "half a byte below." Rewording it, you might say something like "the address is as much lower as the number of values half a byte can represent," but that's way harder to parse than a simply "The address is 16 bytes lower," which is equivalent. – cadaniluk Dec 23 '16 at 20:57
  • On the last note about typical address referencing one byte, I also had similar issue with this spi flash device data sheet where for the life of me I couldn't decipher directly the size of an individual address other than to work it out indirectly from single byte program command, in which case the spi flash signals one byte of data on the SO. https://developer.mbed.org/media/uploads/emmibed/sst25vf016b_serialflash_spi.pdf – marshal craft Dec 23 '16 at 21:03
  • @marshalcraft That's just how memory is addressed usually. Every address corresponds to one byte. It's nothing to do with Intel, CPU architectures just work that way. Note that there are CPUs where a byte did not correspond to eight bits. Nowadays, though, a byte is eight bits. Since a byte need not be *eight* bits (though some claim it is always eight bits, I already had discussions on that), you could define a machine where a byte is *one* bit, so byte-addressable memory is bit-addressable simultaneously. That's just theory, though, no architecture does it that way. – cadaniluk Dec 23 '16 at 21:07
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    In most processors each address addresses a byte, but on some processors each address refers to a word. e.g. some TI processors are not byte addressable. – Randy Leberknight Dec 23 '16 at 22:54