Moore machine, Verilog

Question

I want to implement a MOORE FSM that finds the min and max of an array of 10 elements by using 2 always blocks,both of them use the same states but on different halves of the array. Does it work if I use the same state names in both always blocks but with different implementations(each one of them affects different registers)?

Answer 1

Yes it is possible. In fact if you do it this way the code may be more understandable since you'll understand the implementation of each register.

parameter   S_START = 0,
            S_DO_SOMETHING = 1,
            S_DO_ANOTHER = 2,
            S_END = 3

integer current_state = S_START;

always @ (posedge clk)
case (current_state):
 // define state transitions
endcase

always @ (posedge clk)
case (current_state):
 // modify a register according to state
end

always @ (posedge clk)
case (current_state):
 // modify another register according to state
end

Just make sure that each register is modified at only one always block.