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A combinational circuit is to be designed that counts the number of occurrences of 1 bits in a 4 bit input. However, an input 1111 is an invalid input for the circuit and output in such case will be 00.

One valid input for such circuit may be 1110 with the output 11; another valid input may be 1010 with the output 10.

Draw the truth table for the circuit. Use the Karnaugh map to design the circuit and draw it using AND,OR and NOT gates.

Kit Ostrihon
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1 Answers1

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Because the 4bit input can have at most 4 ones in it, we can encode the output into 3bit long binary number.

The truth-table would look like this:

 w x y z   y_2 y_1 y_0
---------+-------------   number of positive bits
 0 0 0 0 |  0   0   0   ~ 0
 0 0 0 1 |  0   0   1   ~ 1
 0 0 1 0 |  0   0   1   ~ 1
 0 0 1 1 |  0   1   0   ~ 2
---------+-------------
 0 1 0 0 |  0   0   1   ~ 1
 0 1 0 1 |  0   1   0   ~ 2
 0 1 1 0 |  0   1   0   ~ 2
 0 1 1 1 |  0   1   1   ~ 3
---------+-------------
 1 0 0 0 |  0   0   1   ~ 1
 1 0 0 1 |  0   1   0   ~ 2
 1 0 1 0 |  0   1   0   ~ 2
 1 0 1 1 |  0   1   1   ~ 3
---------+------------- 
 1 1 0 0 |  0   1   0   ~ 2
 1 1 0 1 |  0   1   1   ~ 3
 1 1 1 0 |  0   1   1   ~ 3
 1 1 1 1 |  1   0   0   ~ 4

BUT! The output in your case is only on two bits. Your specification also consider the 1111 input as invalid with 00 output. therefore you can simply delete the most significant column in the truth table and there will be no other change:

 w x y z   y_1 y_0
---------+---------   number of positive bits
 0 0 0 0 |  0   0   ~ 0
 0 0 0 1 |  0   1   ~ 1
 0 0 1 0 |  0   1   ~ 1
 0 0 1 1 |  1   0   ~ 2
---------+-------------
 0 1 0 0 |  0   1   ~ 1
 0 1 0 1 |  1   0   ~ 2
 0 1 1 0 |  1   0   ~ 2
 0 1 1 1 |  1   1   ~ 3
---------+-------------
 1 0 0 0 |  0   1   ~ 1
 1 0 0 1 |  1   0   ~ 2
 1 0 1 0 |  1   0   ~ 2
 1 0 1 1 |  1   1   ~ 3
---------+------------- 
 1 1 0 0 |  1   0   ~ 2
 1 1 0 1 |  1   1   ~ 3
 1 1 1 0 |  1   1   ~ 3
 1 1 1 1 |  0   0   ~ invalid, showing zeros

Now you can use different styles for minimizing the output functions y_1 and y_0, but I think the Karnaugh maps are suitable for this.

Transfer the lines of the truth-table for each of the output functions into a separate K-map using the indexes (number of line in the table indexed from zero) or comparing the combinations of the variables.

For the output function y_0 the final K-map looks like this and as you can see that is the minimized SOP (DNF; disjunction of conjunctions) function with no larger groups (terms) to be found.

y_0 = ¬w·¬x·¬y·z + ¬w·x·¬y·¬z + ¬w·¬x·y·¬z + ¬w·x·y·z 
       + w·¬x·y·z + w·x·y·¬z + w·¬x·¬y·¬z + w·x·¬y·z

K-map for the output function y_0

For the most significant bit of the output I chose to find the POS (CNF; conjunction of disjunctions), because there are fewer cases of 0 bits than 1 bits in the output.

The output function can be as well as in the y_0 described by marking out all the right bits. In this case it would be this K-map and the function:

y_1 = (w + x + y + z) · (w + x + y + ¬z) · (w + ¬x + y + z) 
      · (w + x + ¬y + z) · (¬w + ¬x + ¬y + ¬z) · (¬w + x + y + z)

K-map for the output function y_1 before minimization

But that can be minimized to this output function in the K-map:

y_1 = (w + x + y) · (w + y + z) · (w + x + z) 
      · (¬w + ¬x + ¬y + ¬z) · (x + y + z) 

K-map for the output function y_1 after minimization

After that you can just use the right gates or transform it to more suitable combination of gates using Rott's grids.

Kit Ostrihon
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