First of all, the "ARM" denotes many different processors - they differ one from another much more, then first 8088 and newest "Pentium"-s.
The ARM-s instruction set is very different from x86's one. ARM may have two different instruction sets (Thumb and ARM native, many have the Thumb only) and, if both are implemented, a jump to an odd address causes execution of the Thumb, while a jump to an even address causes execution in of the ARM set. It has selective multiregister "push", "pop", "load", and "store" (e.g. "push {R0,R4-R11}" - x86 push either one or all registers) and conditional executing of usual instructions (needs prefix), but it does not have anything like "loop", "movsb", segment registers, specialized index registers, specialized I/O instructions...
ARM processors are fairly complicated - e.g. documentation of ARMv7-M architecture has over 900 pages (Intel 80386 - 126 pages; well, 64-bit Intel CPU "Instruction Set Reference" has over 2K pages, seems any document grows until its size exceeds capacity of intended readers), and another document describing on-chip peripherals has another 1500 pages - seems the single chip (not every) has more peripherals, than typical PC.
As BIOS is concerned: I am just exploring LPC-Link2 containing LPC4370 chip (which has 3 ARM CPU-s: Cortex-M4 and 2 Cortex-M0; only the first starts on power-on or reset, other must be activated by the first), and it has some BIOS - the BIOS can boot an OS from "SPIFI" (it is a kind of EEPROM, 1MB, external to the LPC4370, but put on the board; the SPIFI can serve as a "boot device" (the code is copied to chip's RAM and then executed), or as a memory from which the OS runs (directly, without copying) - the BIOS looks at its contents and uses it in one of these two ways), or via USB (with help of a program running on another machine and connecting the LPC-Link2 as an USB device). Many other chips have FLASH memory (internal to the chip) and boot or run an OS from it. Usually they have a serial interface which can be used for debugging (and it has e.g. 2 protocols, one of them being selected when the chip is reset).