I'm using RISC-V I would like to customize the number of cores in a tile.
Which chisel file should I modify?
Are you using RocketChip generator? If you want to create several cores, you can change the number of cores in "rocket-chip/src/main/scala/uncore/Builder.scala" NTiles param. If you want to add it inside a Tile, maybe you should modify rocket.scala and tile.scala, but take into account that they will share the L1 cachés and that could create conflicts.