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funcctional Block Diagram

Hi, I do have a MT7620 Board, and want to use RGMII port, on the datasheet comes with board, it shows me a diagram like what I post. the red circle area. shows that somehow the RGMII comes in to the switch port which by my understanding is the LAN port on the board.

my question is how I can enable the RGMII, and connect it with my device(which port on the board I should connect). Is it a auto config or I need to do something for it(eg, DTS).

I am new to this, so please answer more detail. and If I make anything not clear, ask. Thanks

dawenzi098
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2 Answers2

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Has been days, but no one come to answer, just post what I found for my question.

I borrow some machine from lab so that I can check the signal on board. I connect the board to internet and my laptop on the other side. and open a video page on browser. so that there will be some data flow between board and my laptop.

I use the machine to check the pins on the board which the circuit map shows belong to RGMII. but there is nothing, no signal comes up. which means the RGMII pins doesn't work by default.

So I assume that I need to edit some DTS to enable the RGMII signal. But I have no idea how to do this now. If anyone knows it. Please write it down. Thanks.

dawenzi098
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I am not sure of the specific board you are using , but yes the RGMII pins have to configured. If connecting a PHY to a microcontroller, you need to specify the negotiation speed for the TX and RX clock, along with other data pins. Something similar to this - 

const IfxGeth_Eth_RgmiiPins Rgmiipins = {
        //Set the reference clock
        .txClk = &IfxGeth_TXCLK_P11_4_OUT , 
        .txd0 = &IfxGeth_TXD0_P11_3_OUT ,
        .txd1 = &IfxGeth_TXD1_P11_2_OUT ,
        .txd2 = &IfxGeth_TXD2_P11_1_OUT ,
        .txd3 = &IfxGeth_TXD3_P11_0_OUT ,
        .txCtl = &IfxGeth_TXCTL_P11_6_OUT , 
        .rxClk = &IfxGeth_RXCLKA_P11_12_IN ,
        .rxd0 = &IfxGeth_RXD0A_P11_10_IN ,
        .rxd1 = &IfxGeth_RXD1A_P11_9_IN ,
        .rxd2 = &IfxGeth_RXD2A_P11_8_IN ,
        .rxd3 = &IfxGeth_RXD3A_P11_7_IN ,
        .rxCtl = &IfxGeth_RXCTLA_P11_11_IN ,    
        .mdc = &IfxGeth_MDC_P12_0_OUT ,     
        .mdio = &IfxGeth_MDIO_P12_1_INOUT , 
        .grefClk = &IfxGeth_GREFCLK_P11_5_IN ,  
};

Now you say you are connecting it to a laptop. I did not understand your question completely, but if there is a linux kernel involved somewhere, then yes you need to modify the Device Tree. Here is a link you can start with. Here is an example, taken from the same source-

 ethernet@e000b000 {
            compatible = "cdns,zynq-gem", "cdns,gem";
            reg = <0xe000b000 0x1000>;
            status = "okay";
            interrupts = <0x0 0x16 0x4>;
            clocks = <0x1 0x1e 0x1 0x1e 0x1 0xd>;
            clock-names = "pclk", "hclk", "tx_clk";
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            local-mac-address = [00 0a 35 00 00 00];
            phy-mode = "rgmii-id";
            xlnx,ptp-enet-clock = <0x6750918>;
            phy-handle = <0x4>;

            mdio {
                #address-cells = <0x1>;
                #size-cells = <0x0>;

                phy@1 {
                    compatible = "realtek,RTL8211E";
                    device_type = "ethernet-phy";
                    reg = <0x1>;
                    linux,phandle = <0x4>;
                    phandle = <0x4>;
                };
            };
        };

Hope this will get you started.

NanoNi
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