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I'm implementing a hardware double precision adder with Verilog. During the verification phase when I compare my hardware output to MATLAB (or C) double precision addition outputs I found some weird cases where the LSB is not matching, taking into account that I'm using the same rounding mode (round to nearest even). My question is about the accuracy of the C calculation, is it truly accurate in doing the rounding or it's limited to some CPU architecture (32 or 64 bits)?

Here's an example,

A = 0x62a5a1c59bd10037 = 1.5944933396238637e+167

B = 0x62724bc40659bf0c = 1.685748657333889e+166 = 0.1685748657333889e+167

The correct output (just by doing the addition of the above real numbers manually)

= 1.7630682053572526e+167 = 0x62a7eb3e1c9c3819 (this matches my hardware)

When I try doing A+B in C, the result is equal to

= 1.7630682053572525e+167 = 0x62a7eb3e1c9c3818

When I try this application to check the intermediate operations http://www.ecs.umass.edu/ece/koren/arith/simulator/FPAdd/

I can see from mantissa addition that C is not doing the rounding correctly (round to nearest even). In this case the mantissa should be rounded by adding one. Any idea why this is happening?

Amr Suleiman
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1 Answers1

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The operation of http://www.ecs.umass.edu/ece/koren/arith/simulator/FPAdd/ is correct. The last round to nearest even peforms a downward rounding:

A+B  + 1.0111111010110011111000011100100111000011100000011000|10 *2^555
                                                            ^
                                                            |
to forget the |10 part (exactly in the middle), the result chooses 0 (even) instead of 1
Franck
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