I am referring to the following link, https://github.com/ucb-bar/zscale/issues/1 which denotes that zscale can be built from the rocket-chip generator with just different build option.
make CONFIG=ZscaleConfig MODEL=ZscaleTop verilog" instead.
However, from https://github.com/ucb-bar/rocket-chip.git repository,
I find no such configuration 'ZscaleConfig' nor the ZscaleChip.scala
in the proper directory. The only place I find those configuration and
files are the following repository.
gitlab.cs.fau.de/osek-v/osek-v/tree/a3c9431ee20f94bf2826251680de61b8d640b02d
Unfortunately, the repository seems to be somewhat out-of-date, and it won't build properly due to un-resolved tool dependencies (various proxies seems to be dead).
Is building the ZScale core from scala still a valid way of acquiring the verilog files, or downloading and using VScale the only way? If possible I'd like to build from scala, since it supports many more powerful functions, such as changing configuration in high-level language or C simulation (RTL simulation) that does not need VCS to run the tests.
Thank you all, in advance.