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suppose we have two control input bits to ALU

zx-------zero the x input.
nx-------negate the x input.

when these both bit are set then in which order x input is manipulated or firstly which control bit get the priority as the result obtained by operating zx first is different from the scenario where nx is done first?

OldSchool
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    Do you have a specific CPU architecture in mind? – Leon Jul 27 '16 at 17:57
  • @Leon actually I am reading The Elements of Computer System where the design of ALU is given – OldSchool Jul 27 '16 at 18:35
  • As currently formulated (including your comment) your question will hardly be answered here. – Leon Jul 27 '16 at 18:50
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    [Also posted on CS.SE](http://cs.stackexchange.com/q/61004/755). Please [do not post the same question on multiple sites](http://meta.stackexchange.com/q/64068). Each community should have an honest shot at answering without anybody's time being wasted. – D.W. Jul 27 '16 at 19:38
  • Each question has to stand on its own. Your previous question said something about what architecture you were talking about, and you need to repeat some of that here. Preferably including any links to relevant sections of the docs that people can read to see what you're missing. It's almost certainly documented somewhere. – Peter Cordes Jul 28 '16 at 06:26

1 Answers1

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From a conceptual point of view asserting both zx and nx is a bug in the microcode or control logic1.

What exactly happens is strongly micro-architecture specific.
We can however hypothesize a very simple machine, where

  • zx enable the clear signal of the destination register.
  • nx enable the data-path from the adder2 into the destination register.

At the next clock a register will be concurrently feed with input and asked to clear it self.
What it will actually do depends on the manufacturer, taking the first Google result for PIPO register datasheet3 we can see this table

Truth table of a 4-bit PIPO register. CLEAR takes precedence over input

When #CLEAR is active (it is active low), no matter the mode or input, the register is zeroed.

1 Unless zx and nx have a meaning together of course. For example selecting one out of four operations.
2 Assuming -A is computed as A̅ + 1.
3 It founds a 4-bit PIPO register datasheet.

Margaret Bloom
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