data bus and addressing memory confusion

Question

I have learned 8086 CPU has 16bit data bus, and Pentium CPU has 32bit data bus, which mean each memory address holds size of data bus.

For example:

16bit = 2^16 = 65,536 
binary 0000 0000 0000 0000 ~ 1111 1111 1111 1111
hex    0000 0000 ~ FFFF FFFF
dec    000,000 ~ 65,535

65,536 / 1024 = 64 so can be 64kbyte of maximum memory address.
like 0x 0000,0000 ~ 0x FFFF,FFFF  


32bit = 2^32 = 4,294,967,296
binary 0000 0000 0000 0000 0000 0000 0000 0000 
~ 1111 1111 1111 1111 1111 1111 1111 1111
hex    0000 0000 0000 0000 ~ FFFF FFFF FFFF FFFF
dec    0,000,000,000 ~ 4,294,967,296

4,294,967,296 / 1024 / 1024 = 4 so can be 4mb of maximum memory address 
like 0x 0000,0000,0000,0000 ~ 0x FFFF,FFFF,FFFF,FFFF

Am I correct? I think so. But in C programming:

int arr[2];
printf("%p %p \n", &arr[0],&arr[1]);
-----------------------------------
0x 7fff5c474b20,  0x 7fff5c474b24  (this is 64bit addressing)

I know integer is 4 byte. Size of &arr[1]-&arr[0] is 0x4 which means every address holds only 8bit data bus.

If the CPU can hold more than 8bit why does C hold only 8bit?

Well, actually you are confusing some stuff pretty bad. You don't have to write the full data segment, you are allowed to write single bytes (or read them). The difference between the addresses is 4 bytes (which means `int` is 32-bit on that platform). — Paul Stelian, Jul 11 '16 at 09:18
I don't get the 8-bit thing since 4 bytes is 32 bits. (8 bits per byte is something not really that specific) — Paul Stelian, Jul 11 '16 at 09:18
You are also doing further base conversion faults (32-bit addresses in base 16 are 0000 0000 to FFFF FFFF) — Paul Stelian, Jul 11 '16 at 09:19
Pointers can be of any width. They can be 32-bit, they can even be 16-bit, it depends on where you actually compile the program. Also, the transformation between the C program and the machine code is non-trivial. — Paul Stelian, Jul 11 '16 at 09:20
Each memory address holds 8 bits, or 1 byte. The data bus really says how many bits (and how many bytes) the CPU can access in a single cycle. — Paul Stelian, Jul 11 '16 at 09:21
deer@Paul Stelian , yes 32bit 0-FFFF FFFF, thank you correcting that. and if int i = 10; positioned on memory address 0xAABB0000, it actually 0xAABB0000 = 0000 1010, 0xAABB0001 = 0000 0000 0xAABB0002 = 0000 0000, 0xAABB0003 = 0000 0000, like use 4byte, but what i point was 0xAABB0000 can hold full 0000 0000 0000 0000 0000 0000 0000 1010 ? can't hold 32bit data bus? — Jeungwoo Park, Jul 11 '16 at 10:13

Serge Ballesta · Accepted Answer · 2016-07-11T11:48:14.490

Oups... Things are not exactly what you have written - I speak about the 8086 (I'm old enough to have worked with it...). You will find more references on it on wikipedia)

the data bus is 16 bits wide, meaning that is can transfer 2 bytes in one single operations
the address but is 20 bits wide, meaning that the memory addresses are in range 0 - 0xFFFFF or 1M

The 8086 used based addressing mode: an address was represented by a segment (16 bits register) and an offset, the actual address being segment * 16 + offset - btw, addresses had different representation for example 0x20010 could be represented as 2000:0010 or 2001:0000 1FFF:0020

And... there was no 64 bits addressing mode on a 8086!

Now for your actual question, C specifies that the smallest addressable memory shall be a char or byte, and that a single char shall contain any character from the alphabet used is C source (upper and lower case letters, digits, and some symbols so at least 7 bits). Common processors (all I know) use 8 bits byte addressing, independently of the bus size. That means that consecutive addresses are addresses of consecutive bytes.

The fact that be data bus is 16, 32 or 64 bits wide simply allow one single memory access to load respectively 2, 4 or 8 bytes on a single operation. Some processors (ARM for example) require multi-bytes memory accesses to be correctly aligned : you can read a 16 bit word only on even addresses for example and any attempt to read a 16 bits work from an odd address will result in a processor trap.

And remember that nothing (except simplicity) forces processor designer to have a data bus and an address bus of same size.

deer@Serge Ballesta. I know what you saying, that is what dos manage memory. My point was real memory addressing and data bus. — Jeungwoo Park, Jul 11 '16 at 10:24
@JeungwooPark: What I said is that data bus and address bus are different object and may have different sizes. And old versions of BSD or Linux supported 8086, so this is not related to MS/ DOS. But see my edit — Serge Ballesta, Jul 11 '16 at 11:48
@Serge Ballesta. each one of memory address can have 32bit or 4byte data. and integer is 4byte. why c program use 4 memory addresses? ex) int a=10; 0x[][][][][][][]0 = 0000 1010, 0x[][][][][][][]1 = 0000 0000, 0x[][][][][][]2= 0000 0000, 0x[][][][][][][]3 = 0000 0000 ; even a memory address such 0x[][][][][][][]0 can have 32bit or 4byte data all. — Jeungwoo Park, Jul 12 '16 at 00:20

score 2 · Answer 2 · answered Jul 11 '16 at 09:48

On x86 each distinct address addresses a byte of 8 bits.

The data bus width means that the processor can fetch that many bits in parallel. And actually Pentium processors have a 64-bit data bus (overdrive processors that you can install to 486 mother boards have 32-bit bus though), so they can fetch 8 consecutive 8-bit bytes at the same time.

Say, if the processor issues a memory read for address 0x00001230 for example, it can fetch the bytes at addresses 0x00001230 to 0x00001237 (8 bytes) at the same time into its internal cache.

deer@Antti Haapala , yes pentium has 64bit data bus, but 32bit register. I was mistaken by data bus. — Jeungwoo Park, Jul 11 '16 at 10:52

data bus and addressing memory confusion

2 Answers2