How do I generates SPI core in Qsys?

Question

I having some issues with generating SPI master core in qsys.

I opened a clean design (with no core in it), and added the SPI core to it and exported all of its signals.

When I tries to generate the design, its gives an error about a missing file - spi_0 What am i doing wrong?

Answer 1

I figured it out, it was quit weird. Turns out Qsys requires a "clock source" IP core in order to generate the SPI core.