I am working on a project on hardware preemption in fpga. I have two independent tasks. Initially, say, task 1 is running and task 2 is not. Now when I preempt task 1, it should stop and its context should be stored in a memory unit and task 2 should begin. When I preempt task 2, it should stop and its context should be saved in the memory. At the same time, meanwhile, the context of task 1 should be restored and task 1 should restart from the preempted state. I have done it using a FIFO module which is included in the bitstream file in which I have the two tasks. Is there any non volatile memory available on the artix 7 based basys3 board which can be used to store/restore the context of the tasks, so that the context is stored on it permanently even after downloading another bitstream file on the board? And if there is, then how can I use it in my program? I am using Xilinx vivad 2015.4 version to configure Artix 7 based Basys3 board.
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1The Basys3 board has NV memory (Flash), but you should use it for your purpose. At first, it's very slow and secondly it doesn't support so many write cycles as your design needs. – Paebbels Jun 15 '16 at 12:58
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1@Paebbels - do you mean 'shouldn't use if for your purpose'? – Jun 16 '16 at 00:06
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@user1155120 Yes, sorry somebody stole the "not" :). – Paebbels Jun 16 '16 at 12:29