AM335x GPIO muxing in device tree gets reset during kernel load

Question

I want to configure set of SoC pins to be used as GPIO inputs or outputs with default values. We are using am3352 SoC and custom board similar to Beaglebone Black.

I checked through debug logs that device tree get parsed correctly.

But when I check after the Kernel loads, All the GPIOs I have pinmuxed are in default state (ie: all are inputs and value is 0)

Directions and default values I set in device tree are not there. (reset?)

Any clue or help is much appreciated.

I decided to do this pinmuxing in device tree and my device tree entries are as follows.

/* In am33xx.dtsi, same file as used in Beaglebone Black */

gpio0: gpio@44e07000 {
        compatible = "ti,omap4-gpio";
        ti,hwmods = "gpio1";
        gpio-controller;
        #gpio-cells = <2>;
        interrupt-controller;
        #interrupt-cells = <2>;
        reg = <0x44e07000 0x1000>;
        interrupts = <96>;
    };

    gpio1: gpio@4804c000 {
        compatible = "ti,omap4-gpio";
        ti,hwmods = "gpio2";
        gpio-controller;
        #gpio-cells = <2>;
        interrupt-controller;
        #interrupt-cells = <2>;
        reg = <0x4804c000 0x1000>;
        interrupts = <98>;
    };

    gpio2: gpio@481ac000 {
        compatible = "ti,omap4-gpio";
        ti,hwmods = "gpio3";
        gpio-controller;
        #gpio-cells = <2>;
        interrupt-controller;
        #interrupt-cells = <2>;
        reg = <0x481ac000 0x1000>;
        interrupts = <32>;
    };

    gpio3: gpio@481ae000 {
        compatible = "ti,omap4-gpio";
        ti,hwmods = "gpio4";
        gpio-controller;
        #gpio-cells = <2>;
        interrupt-controller;
        #interrupt-cells = <2>;
        reg = <0x481ae000 0x1000>;
        interrupts = <62>;
    };

/* Then in am335x-boneblack.dts file i have added following*/

&am33xx_pinmux {
  gpio0_pins: gpio0_pins {
    pinctrl-single,pins = <                                                       
        0x144 (PIN_OUTPUT_PULLUP | MUX_MODE7)     /* RMII1_REF_CLK as GPIO out */
        0x158 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_spi0_d1 as GPIO out */              
        0x15c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_spi0_cs0 as GPIO out */              
        /*0x160 (PIN_INPUT | MUX_MODE7)*/             /* pin conf_spi0_cs1 as GPIO input */              
    >;
  };

  gpio1_pins: gpio1_pins {
    pinctrl-single,pins = <                                                      
        0x050 (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_a4 as GPIO input */              
        0x054 (PIN_OUTPUT_PULLUP | MUX_MODE7)     /* pin conf_gpmc_a5 as GPIO out */              
        0x05c (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_a7 as GPIO input */              
        0x058 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_gpmc_a6 as GPIO out */              
        0x060 (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_a8 as GPIO input */              
        0x064 (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_a9 as GPIO input */              
        /*0x068 (PIN_OUTPUT_PULLUP | MUX_MODE7)*/     /* pin conf_gpmc_a10 as GPIO out */              
        0x06c (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_a11 as GPIO input */              
        /*0x078 (PIN_OUTPUT_PULLUP | MUX_MODE7)*/     /* pin gpmc_ben1 as GPIO out */              
        0x080 (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_csn1 as GPIO input */              
        0x084 (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_csn2 as GPIO input */              
    >;
  };

  gpio2_pins: gpio2_pins {
    pinctrl-single,pins = <                                                      
        0x088 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_gpmc_csn3 as GPIO output */              
        0x08c (PIN_INPUT | MUX_MODE7)             /* pin conf_gpmc_csn3 as GPIO input */              
        0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE7)     /* pin conf_lcd_data1 as GPIO out */              
        0x0a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_lcd_data2 as GPIO out */              
        0x0b0 (PIN_INPUT | MUX_MODE7)             /* pin conf_lcd_data4 as GPIO input */              
        0x0b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_lcd_data5 as GPIO out */              
        0x0b8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_lcd_data6 as GPIO out */              
        0x0bc (PIN_OUTPUT_PULLDOWN | MUX_MODE7)   /* pin conf_lcd_data7 as GPIO out */              
        0x0e8 (PIN_INPUT | MUX_MODE7)             /* pin conf_lcd_pclk as GPIO input */              
        0x0e0 (PIN_INPUT | MUX_MODE7)             /* pin conf_lcd_vsync as GPIO input */              
    >;
  };

  gpio3_pins: gpio3_pins {
    pinctrl-single,pins = <                                                      
        /*0x1a0 (PIN_OUTPUT_PULLUP | MUX_MODE7)*/   /* pin conf_mcasp0_aclkr as GPIO out */              
        0x1a4 (PIN_INPUT | MUX_MODE7)   /* pin conf_mcasp0_fsr as GPIO input */              
        0x1a8 (PIN_INPUT | MUX_MODE7)   /* pin conf_mcasp0_axr1 as GPIO input */              
    >;
  };
};

&gpio0{
    ti,gpio-always-on;
    pinctrl-names = "default";
    pinctrl-0 = <&gpio0_pins>;
    status = "okay";
};

&gpio1{
    ti,gpio-always-on;
    pinctrl-names = "default";
    pinctrl-0 = <&gpio1_pins>;
    status = "okay";
};

&gpio2{
    ti,gpio-always-on;
    pinctrl-names = "default";
    pinctrl-0 = <&gpio2_pins>;
    status = "okay";
};

&gpio3{
    ti,gpio-always-on;
    pinctrl-names = "default";
    pinctrl-0 = <&gpio3_pins>;
    status = "okay";
};

An SoC is not just a CPU. Have you enabled debug for pinctrl and gpio subsystems? — sawdust, Jun 08 '16 at 21:06
@thom_nic Sorry for delaying the reply. Yes I did, I made a tiny modification in to Linux GPIO kernel driver. If you are still interested let me know, I will post the patch here. — nilan, Mar 26 '17 at 00:10
Yes please! I was going to go down the route of using a pin hog definition but can't find many other examples of that for this chip so I have not tried it yet. — thom_nic, Mar 26 '17 at 00:39

Jamie · Answer 1 · 2018-10-16T09:18:46.003

I had a similar problem, with gpio being reset on kernel startup when I had configured them in the bootloader, and found a different solution.

The solution I came across was in the device tree;

    &gpio0 {
       ti,no-reset-on-init;
    };

This stopped the init process from resetting the gpio module. I had to add this option to the two gpio modules I wanted to remain in the state the bootloader had set them to.

score 0 · Answer 2 · answered Mar 26 '17 at 10:20

1 diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
  2 index cb6f820..48fe676 100644
  3 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
  4 +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
  5 @@ -608,7 +608,7 @@ static struct omap_hwmod_class_sysconfig am33xx_gpio_sysc = {
  6     .sysc_offs  = 0x0010,
  7     .syss_offs  = 0x0114,
  8     .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
  9 -             SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
 10 +             SYSC_HAS_SIDLEMODE /*|SYSC_HAS_SOFTRESET*/ |
 11               SYSS_HAS_RESET_STATUS),
 12     .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
 13               SIDLE_SMART_WKUP),

AM335x GPIO muxing in device tree gets reset during kernel load

2 Answers2