I'm trying to compile a simple hello world module following this guide and I'm confused about what the Makefile is actually doing.
obj-m += hello-1.o
all:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
I understand that when i type the make
command it will run the all
recipe which runs make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
. So now it runs the Makefile found at the path given after the -C
flag but what does the M=$(PWD) modules
do?