In HDL file ///.hdl Line , Can't connect part's output pin to gate's input pin: load .hdl

Question

SPOILER ALERT: Contains a brief code snippet from Memory.hdl (project 5).

I am receiving the error listed in the title of this question, yet I am certain that it is not related to connecting an internal part's output pin to the chip's input pin.

Here's the code which is creating the error. There's no other code in the program so far.

CHIP Memory {
    IN in[16], load, address[15];
    OUT out[16];

    PARTS:
    DMux(in=load,sel=address[14],a=load_ram,b=load_other);
}

What is going on?!

Answer 1

Solution: Remove the underscore characters from your pin names.

The hardware simulator is producing the wrong error message. The issue is that the underscore character (_) is not a valid character for pin names. So when the hardware simulator sees a=load_ram it parses it as a=load ram. Since load is the name of an input pin for Memory, that explains why you are seeing that error.

http://nand2tetris-questions-and-answers-forum.32033.n3.nabble.com/Cannot-connect-part-s-output-pin-to-gate-s-input-pin-tp4025858p4025859.html