2

The vendors of EDA tools for HDL design and simulation are increasingly using the term quality of result (QoR). Especially when it comes to high level synthesis (HLS) for FPGAs the term is used in inflationary numbers, without prior definition.
But how is QoR defined? Is QoR a metric for a piece of HDL code or a metric for the performance of an EDA tool?

--

The QoR article on Wikipedia does only give a very brief description, mainly about the historical origins of the term, i.e. QoR was used from the 1980s onward to characterize a chip design in terms of silicon area, power consumption &cetera.
Nowadays the terms seems to be used in a more general sense. Also, it sounds like a generic yet fancy way of expressing that A is better than B somehow.

I am consciously taking the risk that this question may be considered "too broad", but imho that will just mean that no concise definition of the term QoR exists...

andrsmllr
  • 1,231
  • 18
  • 39

3 Answers3

0

"what's your QoR?"

Traditionally would be answered 324 MHz, 349 K gates, and 6.2 W. These values are, with QoR, measured using estimated models of expected average interconnect effects.

Some info can be here and here too.

Prakash Darji
  • 990
  • 6
  • 13
  • The first link defines a new metric _quality of silicon_ (QoS) which, in short, is set to QoS = QoR + wire interconnect (thus applies to ASICs only). Besides that the QoR term is used with the classic 1980s meaning, i.e. as an _early estimate_ of the final chips performance. The second link basically just says QoR = max. frequency, but I doubt that that will serve as a good definition. – andrsmllr Mar 28 '16 at 10:09
  • According to you, in simple word, what could be the QoR? – Prakash Darji Mar 28 '16 at 10:21
0

In the Xilinx user forum the question "What is quality of result" was answered like this [1]:

QOR is (here) defined as what happens when we run through our suite of 150 (roughly) designs. We have a golden set of actual customer designs, We also have designs that have been troublesome in the past. We use these suites to compare how our tools behave in terms of all the resulting metrics. For example, if it is performance, we will continue to constrain the period constraint untill successive trials are unable to meet timing. If it is time to a bitstream, it is real time to a finished design. So on and so forth for each and every metric. [...] How do you measure QOR betweem vendors? Many have tried, all have failed. There is no trusted way to do that of which I am aware.

In the Altera user forum a definition of quality of result was given as [2]:

Altera uses the term in many different contexts. It can mean different things depending on it's usage. It could mean consistency/improvement (Fmax, area, etc..) or if it's in the context of an IP it means the IP has a consistent/improved bandwidth or quality of bandwidth (i.e. no starvation). It's an industry wide term so Altera uses the term just like everyone else.

It's interesting to see that Xilinx sees QoR as a metric measured as an average over many different designs. Altera on the other hand rather sees QoR as a more or less fixed metric which depends on the context.

When comparing both "definitions" I think Xilinx did a better job, because they also gave insight into the methodology they use to determine and maintain QoR throughout the evolution of their EDA tools. Altera rather generalizes and refers to the common industry use of the term QoR, which doesn't say anything really.

andrsmllr
  • 1,231
  • 18
  • 39
0

It generally covers improvement and consistency in the performance of integrated circuits. QoR cover logical combinational blocks (logic gates) to measure the performance of backend eda tools.

eInfochips - Komal C
  • 29
  • 4