The ARM architecture provides 3 privilege levels PL0 to PL2. While going through other documentation I found exception levels EL0 to EL3.
What is the difference between privilege level & exception level.
Or both are same.
The ARM architecture provides 3 privilege levels PL0 to PL2. While going through other documentation I found exception levels EL0 to EL3.
What is the difference between privilege level & exception level.
Or both are same.
Historically, the opposite of Privilege is User, and User always corresponds to EL0. This is the level corresponding to EL0. In first ARM core, only the equivalent of EL0 and EL1 were defined. The difference is mostly that EL0 does not have access to system registers (Exceptions, program the MMU, etc.) which are reserved to EL1.
Now the recent cores define 2 additional level which have more privilege, ie more and more system registers available:
So in summary EL3 has access to all registers and has full control of the CPU, while EL0 is the one which has the less control, and runs applications.
Got following in ARMv8 programmers guide.
"In ARMv8, execution occurs at one of four Exception levels. In AArch64, the Exception level determines the level of privilege, in a similar way to the privilege levels defined in ARMv7. The Exception level determines the privilege level, so execution at ELn corresponds to privilege PLn. Similarly, an Exception level with a larger value of n than another one is at a higher Exception level."
The idea of privilege levels that was used in earlier designs have been extended. The basic idea has remained the same though, so PL0 is very similar to EL0, yes.
The "normal" documentation on the architecture as well as the programming guide lack clarity in this regard IMHO. However, there is a dedicated document (now) that focuses on privileges and exceptions: Learn the architecture - AArch64 Exception Model