ERROR:MapLib:30 - LOC constraint D7 on xn_index<8> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint F7 on xn_index<7> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint E7 on xn_index<6> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint D5 on xn_index<2> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint B13 on xk_index<1> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint A13 on xk_index<0> is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
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2[How do I ask a good question?](http://stackoverflow.com/help/how-to-ask) (And what you're asking isn't apparent here.) Your errors appear to indicate you're specifying pins that aren't found on the target device. – Mar 04 '16 at 20:43
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2Have you checked the pin names on the specific FPGA package fitted to that device? Have you selected the correct package type (and not something like a PQ208 with pins numbered 1 to 208) in your project settings? – Mar 04 '16 at 20:50
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1Looking in the [Device/Package 6slx9csg324](http://www.xilinx.com/support/packagefiles/s6packages/6slx9csg324pkg.txt) file we see D7 is VCCO_0, F7,E7,A13 are not connected on the package and D5 and B13 are grounds. Your [MIMAS V2](http://numato.com/mimas-v2-spartan-6-fpga-development-board-with-ddr-sdram/) constraints appear to leave something to be desired. – Mar 04 '16 at 21:43
2 Answers
Looking at page 67 of the package manual UG385 I can see that some of these pins (F7 and E7 at least) are shown as No Connects for the XC6LX9. That means they aren't connected on your chip.
Edit : Ditto A13.
Pins B13 and D5 are GROUND pins, and D7 is a VCCO supply pin...
See the diagram on page 280 of above document.
So it looks like the UCF file you're using is from some other project, and completely incorrect for your chip on your board and you're going to have to choose a different pin allocation for your project.
As this suggests you are apparently porting a design from some other FPGA board, it's up to you to make sure that whatever external hardware you need is actually present on your board, and use the pins it's connected to (according to your board's manual) in your UCF file.
I had the same problem. Right click on 'Computer' in Windows Explorer, go to 'Advanced Settings' -> Environment Variables and create a new variable called XIL_MAP_LOCWARN and set the value to 1.
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