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I am to implement an 8-to-1 multiplexer using the variables m(1,3,5,6,8,13). The function is:

F(A,B,C,D) = A′B′C′D + A′B′CD + A′BC′D + A′BCD′ + AB′C′D′ + ABC′D

I feel I have a basic idea of how multiplexers work, however I'm not entirely sure what to do with the numbers given. I created a truth table with ABCD and plugged it into the function. Then I created the multiplexer based upon the output. (Which I got to be: D', D', D', D, D, 0, D', 0) The only thing I haven't done, and I can't figure out how to do, is the variables. How do they relate to the function and multiplexer?

Kit Ostrihon
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Tanner
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2 Answers2

3

A multiplexer works as a switch. It selects one of the available inputs I and based on the given address bits S sends the selected input's value on the output Z.

For example:

         –––––––––––  
         |   MUX   |           +-------++-----+-----++-----+
         |         |           | index || a_1 | a_0 ||  f  |
  D_0 –––| I_0     |           |---------------------------|
  D_1 –––| I_1   Z |––– f      |   0   ||  0  |  0  || D_0 |
  D_2 –––| I_2     |           |   1   ||  0  |  1  || D_1 |
  D_3 –––| I_3     |           |   2   ||  1  |  0  || D_2 |
         |         |           |   3   ||  1  |  1  || D_3 |
         |    S    |           +-------++-----+-----++-----+
         –––––––––––
           |    |
          a_1  a_0

In the example the output function is defined:

f = ¬a_1⋅¬a_0⋅D_0 + ¬a_1⋅a_0⋅D_1 + a_1⋅¬a_0⋅D_2 + a_1⋅a_0⋅D_3

In your case, the output is described by the given function of four variables and the multiplexer is supposed to be an 8:1, so there will be three variables used as the address bits (a, b and c) and the fourth (d) as the partitioned off input signal – parameter of the function f(d) representing the output value.

f(a,b,c,d)=¬a⋅¬b⋅¬c⋅d + ¬a⋅¬b⋅c⋅d + ¬a⋅b⋅¬c⋅d + ¬a⋅b⋅c⋅¬d + a⋅¬b⋅¬c⋅¬d + a⋅b⋅¬c⋅d

 index || a | b | c | d || f(a,b,c,d) | f(d)
---------------------------------------------
    0  || 0 | 0 | 0 | 0 ||     0      |  d     
    1  || 0 | 0 | 0 | 1 ||     1      |  d
    2  || 0 | 0 | 1 | 0 ||     0      |  d
    3  || 0 | 0 | 1 | 1 ||     1      |  d
---------------------------------------------
    4  || 0 | 1 | 0 | 0 ||     0      |  d
    5  || 0 | 1 | 0 | 1 ||     1      |  d
    6  || 0 | 1 | 1 | 0 ||     1      | ¬d
    7  || 0 | 1 | 1 | 1 ||     0      | ¬d 
---------------------------------------------
    8  || 1 | 0 | 0 | 0 ||     1      | ¬d
    9  || 1 | 0 | 0 | 1 ||     0      | ¬d
   10  || 1 | 0 | 1 | 0 ||     0      |  0 
   11  || 1 | 0 | 1 | 1 ||     0      |  0
---------------------------------------------
   12  || 1 | 1 | 0 | 0 ||     0      |  d
   13  || 1 | 1 | 0 | 1 ||     1      |  d
   14  || 1 | 1 | 1 | 0 ||     0      |  0
   15  || 1 | 1 | 1 | 1 ||     0      |  0

The truth table has been reduced to 8 lines by partitioning the input signal d off. Now the number of rows matches the number of multiplexer's inputs.

 index || a | b | c || f(d)
-----------------------------
    0  || 0 | 0 | 0 ||   d
    1  || 0 | 0 | 1 ||   d
    2  || 0 | 1 | 0 ||   d
    3  || 0 | 1 | 1 ||  ¬d
-----------------------------
    4  || 1 | 0 | 0 ||  ¬d
    5  || 1 | 0 | 1 ||   0
    6  || 1 | 1 | 0 ||   d
    7  || 1 | 1 | 1 ||   0

In the following picture is a graphical representation of the multiplex.

The 4 inputs 8:1 multiplexer

Kit Ostrihon
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0

Multiplexer (MUX)

MUX is a data selector

  • It allows digital information from several sources be routed into one single line for transmission over the line to a destination

enter image description here

A B C D are the sources and Q is the output. a b are the data selectors

Here is the truth table for 4:1 multiplexer

a | b | Q

0 | 0 | A
0 | 1 | B
1 | 0 | C
1 | 1 | D

The output Q is

Q = A+B+C+B

A=a'b' , B = a'b , C=ab' , D= ab

Q = a'b' + a'b + ab' + ab
Malith Ileperuma
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