0

Is it possible to assign a change in state after a delay?

I am doing a traffic light controller and I want to transition from the yellow state after 4 sec

always @(next_state, EW, Count)
begin
    case (next_state)
    s0: if (EW&Count) next_state = s1; else next_state = s0;
    s1: #4 next_state = s2;
    s2: if ((~EW&~Count)|(~EW&Count)|(EW&Count)) next_state = s3; else next_state = s2;
    s3: #4 next_state = s0;

    endcase
end
Linus Oleander
  • 17,746
  • 15
  • 69
  • 102
Rocky Q
  • 1
  • 1
  • 1
    You may need a counter which counts number of clock cycles and thereafter, change the state. – sharvil111 Dec 03 '15 at 04:09
  • The `#x` Delays aren't synthesizable. Implementing a counter like @sharvil111 suggests is the best solution. (If you're only stalling for a few clock cycles, you could instead implement some interim "dummy state", but this doesn't scale well to larger delays) – wilcroft Dec 03 '15 at 16:04

1 Answers1

0

Create two machines. Lights machine and timer.

When Lights machine enters a state, it sets its outputs connected to lights and sends delay length to timer. Timer starts counting and after given delay it sends tick to the lights machine. Then you can test lights machine quickly without waiting for a timer (when you disconnect it).

Timer is not exactly the finite automata, but it can paritally emulate it and have the same interface, so you can pass messagess between them easily.

I guess the traffic lights is only simplification of your real problem. The separation may look like a overkill for such simple problem, but it is easier to handle multiple simpler machines than one big complex machine. So if your real machine is non-trivial, separation will help.

You can also look at individual lights as separate simple machines, so they can be tested alone. And various state machine verification tools, like Uppaal, can visualize them.

You may also be interrested in Timed Automata theory.

Josef Kufner
  • 2,851
  • 22
  • 28