Baysis2 Keyboard ports always high

Question

I'm trying to create a password system with a baysis2 FPGA and verilog that verifies a password which is entered via keyboard. I need to make sure that my keyboard is working properly, as it seems to be a bit glitchy. I was told that the best way to make sure my keyboard is sending data to the board is by checking to see if ps2d and ps2c are high when I press a button, which makes sense. The problem is that in testing, the two LEDs I bound ps2d and ps2c to are ALWAYS LOGICAL HIGH even when the keyboard is disconnected! Is this some feature of verilog/Xilinx ISE or does my board have a bad port?

The following is my Verilog code.

module wtf(ps2d, ps2c, ps2dout, ps2cout);

    input wire ps2d, ps2c;
    output wire ps2dout, ps2cout;

    assign ps2dout = ps2d;
    assign ps2cout = ps2c;

endmodule

With the following constraint file

NET "ps2c"    LOC = "B1"   | DRIVE = 2  | PULLUP ; 
NET "ps2d"    LOC = "C3"   | DRIVE = 2  | PULLUP ; 
NET "ps2cout" LOC = "G1" ;
NET "ps2dout" LOC = "P4" ;

Why do you have 4 pins? PS/2 is a bidirectional 2-wire bus. – Paebbels Nov 23 '15 at 09:29 — Paebbels, Nov 23 '15 at 09:29
2 for the the ps/2 wires, 2 for the leds for testing. – Noah Mendoza Nov 23 '15 at 19:08 — Noah Mendoza, Nov 23 '15 at 19:08

score 1 · Accepted Answer · answered Nov 23 '15 at 08:59

1

Well, the UCF file enables internal pull-ups on those pins, so reading those as high with nothing connected is exactly what it is supposed to do.

answered Nov 23 '15 at 08:59

alex.forencich

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Ah thanks. I took that directly from the reference without actually knowing what it does. What's the point of using PULLUP? Why read input if it's always going to be set high? – Noah Mendoza Nov 23 '15 at 19:08
It ensures the pin is always at a defined level, even when nothing is connected. If something connected to the pin pulls it low, then it will read as low. – alex.forencich Nov 23 '15 at 19:12

Baysis2 Keyboard ports always high

1 Answers1