I've designed a unit for my homework here,
module homework1(a, b, sel, y);
input signed [7:0] a, b;
input [1:0] sel;
output reg signed [7:0] y;
always @(a or b or sel) begin
case (sel)
2'b00: y = a + b;
2'b01: y = a - b;
2'b10: y = (a > b) ? a : b;
2'b11: y = (a > b) ? b : a;
endcase
end
endmodule
I've designed a pretty simple testbench file to run with Modelsim here,
module testbench();
reg signed [7:0] a, b;
reg [1:0] sel;
wire signed [7:0] y;
homework1 target(a, b, sel, y);
initial begin
$display("Hello!");
$monitor($time, "a = %d, b = %d, sel = %b, y = %d", a, b, sel, y);
#10 sel = 0; a = 32; b = 25;
#10 a = 46; b = 0;
#10 a = 18; b = 52;
#10 a = 37; b = 37;
#10 a = 37; b = 37;
#10 $stop;
end
endmodule
I used Modelsim to run the test bench, and while the waveform came out as expected, but not the text output. Any ideas?
It seems to work in older version of Modelsim. I'm using 10.3d now. Any settings that might cause this?