If the OS writes to the APIC's ICR using one of the destination shorthand (All Excluding Self e.g.), then the destination mode is ignored when APIC delivers the message on APIC bus and ALL the processor's will receive the IPI.
Does this mean that even if the OS sets up Logical Cluster Addressing mode and the system has some cores(not visible to the OS) that are using let's say Physical Destination mode, they will all receive the IPI sent with Destination Shorthand ? what if OS doesn't want the IPI to reach the core that it doesn't know about ? I mean using cluster mode addressing won't really help here if you are using destination shorthand?
Thanks for your comments. I read the SDM but couldn't reach any conclusion on above questions.
