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Execution interrupted or reached maximum runtime.

Here is the link for my code: http://www.edaplayground.com/x/CX8

I am trying to swap numbers in this design.

Matthew Taylor
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Rajesh Reddy
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2 Answers2

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Of course this is not a problem of EDAPlayground. The code might be buggy somewhere.

Your always @(*) block is the main reason your simulation is stuck at a single time stamp. The * denotes that if any RHS variable changes its value, then execute whole block. Here, the variables a_reg and b_reg are continuously swapped on a single time slot. Instead, use always @(posedge clk).

To get a more clear idea refer this link.

Community
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sharvil111
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I believe what you are trying to do is swap two 4-digit numbers 'a' and 'b'. To do this in verilog, you need to remember that when you use the always @(posedge clk) construct, you are actually assigning the old value of the net on the RHS to the register on the LHS. Thus

always @(posedge clk) begin a_out = b; b_out = a; end results in the correct operation, without the need for any additional registers. I have created a copy of your edaplayground project and added a few additional test vectors. http://www.edaplayground.com/x/8hk

Prashant
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