I'm trying to configure the programmable logic inside the parallella board (based on zynq 7020), I insert an sd card that contains bitstream, fsbl.elf and hello_world.elf after the board is booted I tried to do this
zynq-uboot> fatload mmc 0 0x4000000 design_1_wrapper.bit
reading design_1_wrapper.bit
4045678 bytes read
zynq-uboot> fpga loadb 0 0x4000000 4045678
design filename = "design_1_wrapper;UserID=0XFFFFFFFF;Version=2014.3.1"
part number = "7z020clg400"
date = "2015/09/30"
time = "10:58:34"
bytes in bitstream = 4045564
Error: Timeout waiting for FPGA to config.
fpga - loadable FPGA image support
Usage:
fpga [operation type] [device number] [image address] [image size]
fpga operations:
dump [dev] Load device to memory buffer
info [dev] list known device information
load [dev] [address] [size] Load device from memory buffer
loadb [dev] [address] [size] Load device from bitstream buffer (Xilinx only)
loadmk [dev] [address] Load device generated with mkimage
For loadmk operating on FIT format uImage address must include
subimage unit name in the form of addr:<subimg_uname>
zynq-uboot> fpga info 0
Xilinx Device
Descriptor @ 0x3dfb8b84
Family: Zynq PL
Interface type: Device configuration interface (Zynq)
Device Size: 4045564 bytes
Cookie: 0x0 (0)
No Device Function Table.
zynq-uboot>
why the PL is not configured? Is it the size?
Thank you
