As per the definition of the 'Bit error' by protocol developer organization - Bosch : A bit error is detected at the bit time when the bit value monitored by the trasmitter is not the same as the bit actually transmitted by it.
For example, consider a practical scenario on the CAN bus : There are 2 CAN nodes A and B with an Identifier each to transmit on the bus. These 2 nodes start to transmit their respective CAN IDs on the bus and the arbitration mechanism begins. After the Arbitarion is done with, the node with the HIGH priority CAN ID will get the CAN bus access to continue transmission of remaining bits of its CAN frame. The other node [or any other nodes which might be present] on the bus become the receivers of that CAN frame and do not attempt to transmit anything during this time.
Question : If during this time , there is only 1 node which is transmitting and all other nodes are in receive mode, how can a bit error occur ?
1] Could a bit error occur because of a disturbance / EMI effect on the bus line ?
2] Could the sampling and iterpretation of bit sent by the node become faulty at the chip level, leading the CAN chip itself to detect it as a bit error ?
3] Any other reason leading to this ?