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I am trying to compile my program which has a lex file and a yacc file and a couple of C files.I came across this example in the Flex manual.

I have a couple of questions regarding this makefile.It doesn't specify a compiler such as gcc how does the makefile know how to create the targets such as scan.o and parse.o and myprogram.o?

     # Makefile example -- scanner and parser.
     # Creates "myprogram" from "scan.l", "parse.y", and "myprogram.c"
     #
     LEX     = flex
     YACC    = bison -y
     YFLAGS  = -d
     objects = scan.o parse.o myprogram.o

     myprogram: $(objects)
     scan.o: scan.l parse.c
     parse.o: parse.y
     myprogram.o: myprogram.c
rici
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    From the same page: '*The following Makefile does not explicitly instruct make how to build foo.c from foo.l. Instead, it relies on the implicit rules of the make program to build the intermediate file, scan.c:*'. Adding explicit rules for those `.o`s is still a better idea though. – Kninnug Sep 01 '15 at 23:02

1 Answers1

5

That's a Makefile feature: some implicit rules exist and are documented in https://www.gnu.org/software/make/manual/html_node/Catalogue-of-Rules.html#Catalogue-of-Rules

In you case, the relevant part is

Compiling C programs

n.o is made automatically from n.c with a recipe of the form ‘$(CC) $(CPPFLAGS) $(CFLAGS) -c’.

[...]

Yacc for C programs

n.c is made automatically from n.y by running Yacc with the recipe ‘$(YACC) $(YFLAGS)’.

Lex for C programs

n.c is made automatically from n.l by running Lex. The actual recipe is ‘$(LEX) $(LFLAGS)’.

According to https://ftp.gnu.org/old-gnu/Manuals/make-3.79.1/html_chapter/make_12.html some of this rules are not portable...

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