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For some reason I want to map some IO ports in my design to cells. iopadmap provide a good way to do this. I used

iopadmap -inpad IBUF O -widthparam WIDTH -nameparam NAME [my selection rule]

However, when afterwards I use other tools to do timing analysis, it won't analyze these paths since they are neither IO nor constrained by clocks.

My current idea is to add the clock to the cells, to make them just like regular registers. So I added another port CLK to IBUF, but how could I connect the global clock to it? I have multiple IBUF cells, so something like

connect -port t:IBUF CLK top_clock

doesn't work.

Sami Kuhmonen
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Mingyu Gao
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1 Answers1

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The usual approach is to model IO cells as "pass through" cells with in- and output. Use something like the following to create such cells:

iopadmap -inpad IBUF O:I -widthparam WIDTH -nameparam NAME [your selection rule]

However, if you really want to route a clock signal to your IO cells, you'd have to write a small custom pass for that.

CliffordVienna
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