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I am working on Artix 7 (xc7a200t-2fbg676) device. I have generated DDR3 core using MIG v1.9. When I try to simulate the design, it takes 107 us to complete calibration. The simulation runs with a step size of 20ns/s. So it takes more than 30 mins to just calibrate & a total waste of time.

Is there any workaround to reduce this calibration time to an acceptable value of say 16 us as it was in MIG v3.92 for Virtex 6 devices?

Xilinx has suggested a workaround in MIG v1.7 but it is already included in their latest MIG v1.9. Please help me save my precious time if anybody has tried it

KharoBangdo
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  • I didn't simulate a MIG core before, but most Xilinx cores have a generic parameter to shorten simulation time. Is there any generic switch to shorten reset or calibration time? – Paebbels Aug 24 '15 at 06:51
  • @Paebbels Xilinx suggested http://www.xilinx.com/support/answers/52541.html to reduce time in MIG v1.7 but that workaround is already present in MIG v1.9 which I am using. So, according to Xilinx, that's the fastest I can calibrate. Looking for better workaround only in simulation – KharoBangdo Aug 24 '15 at 07:11

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