25

I couldn't find anything in the GNU Makefile Conventions.

Neuron
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Waqas Ilyas
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    You mean apart from `clean`, `veryclean` and target-name-same-as-name-of-file-it-builds? – Beta Aug 21 '15 at 02:31
  • You've hit on one of the main specifications. Perl has its own set of rules, though they're inspired by the GNU conventions. There are probably other sets of conventions for other major projects, but most will have been influenced by the GNU conventions. GNU requires `check`; some other systems use `test` instead. – Jonathan Leffler Aug 23 '15 at 07:06
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    Apart from standard set of targets, like clean, distcleant, install, etc, I also want to know if there are any naming conventions like what to use as a word separator, either a dash, underscore or nothing. What is the convention for parameter names that are passed to a Makefile, are they usually like environment variables which means all caps, and underscore as a separator? – Waqas Ilyas Aug 24 '15 at 17:12
  • Is there a convention or common practice on why the include makefiles are sometimes named as *.mk, and sometimes as Makefile.xxx. Where xxx is replaced by the purpose of the makefile like Makefile.vars or Makefile.util. – Waqas Ilyas Sep 02 '15 at 19:17

3 Answers3

24

This is the implicit naming convention followed by GNU Makefile documentation:

Targets

Target names should use lower case letters. Words are separated with a hyphen - or not separated. E.g.:

test-debug:
    $(build_dir)/debug/bin

or

testdebug:
    $(build_dir)/debug/bin

Variables

Variables that are not special to make, and that are not inherited from the environment, should be in lowercase. Words should be separated with underscore symbol _. E.g.:

src_dir = $(CURDIR)/src
build_dir = $(CURDIR)/build

References:

Makefile style guide (based on GNU Makefile documentation)

GNU Makefile Standard Targets

  • targets: you can find targets like install, install-strip, installcheck

  • variables: you can read "This includes the directories specified as the values of the variables prefix and exec_prefix" within the install target documentation

Maxpm
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Florent Roques
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    Although this is closest to the kind of answer I was looking for but I am unsure how correct this. This seems to be the only, and that too very brief, resource on this subject. Perhaps the answer is that there is no commonly used convention. Looking at the standard target names document (linked above) you find "install-strip" but also ones like "installcheck", "mostlyclean"... Thanks for the info though. I will wait a little before accepting the answer. – Waqas Ilyas Sep 13 '21 at 22:36
  • I am here because I am interested in grouping commands. Currently I am doing image.build and image.push for example. I like it better than image-build image-push but I am not sure. – The Fool Mar 27 '22 at 15:53
6

The most used (I think) are all, clean, compile, run, install, test, and all common task that you may need to build whatever you're buinding.

You could study makefiles inside big projects such as Linux, Vim, etc, but if you want to get standards into your project you will want to use Autotools as well.

For small projects, I usually use meaningful names based on the context, so I can do something like this:

$make compile   (to compile)
$make lib       (to create the libraries)
$make link      (to link the objects into the executable)
$make run       (to run the program)
$make all       (to make all of them at once)

and, to make this happen as expected, I have to insert dependencies like:

all: run

run: link
    # Instructions for run

link: lib
    # Instructions for link

lib: compile
    # Instructions for make the lib

compile:
    #Instructions for compilation
Neuron
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1

Makefile's implicit rules use a set of common variable names which are used by convention for explicit rules, such as:

  • CC: C compiler
  • CFLAGS: C compiler flags
  • CXX: C++ compiler (CPP is for C preprocessor)
  • CXXFLAGS: C++ compiler flags
  • LDFLAGS: Extra flags for linker, such as -L
  • LDLIBS: Library flags, such as -lm
qwr
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