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I would like to reproduce the experiment from Dr. Adrian Thompson, who used genetic algorithm to produce a chip (FPGA) which can distinguish between two different sound signals in a extreme efficient way. For more information please visit this link:

http://archive.bcs.org/bulletin/jan98/leading.htm

After some research I found this FPGA board:

http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=836&PartNo=1

Is this board capable of reproducing Dr. Adrian Thompsons experiment or am I in need of another?

Thank you for your support.

IMC
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1 Answers1

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In terms of programmable logic, the DE1-SoC is about ~20x bigger, and has ~70x as much embedded memory. Practically any modern FPGA is bigger than the "Xilinx XC6216" cited by his papers, as was linked to you in the other instance of this question you asked.

That said, most modern FPGAs don't allow for the same fine-granularity of configuration, as compared to older FPGAs - the internal routing and block structures are more complex, and FPGA vendors want to protect their products and compel you to use their CAD tools.

In short, yes, the DE1-SoC will be able to contain any design from 12+ years ago. As for replicating the specific functions, you should do some more research to determine if the methods used are still feasible with modern chips and CAD tools.

Edit:
user1155120 elaborated on the features of the XC6216 (see link below) that were of value to Thompson.

Fast Configuration: A larger device will generally take longer to configure, as you have to send more configuration data. That said, I/O interfaces are faster than they were 15 years ago, so it depends on your definition of "fast".

Reconfiguration: Cyclone V chips (like the one in the DE1-SoC) do support partial reconfiguration, but the subscription version of the Quartus II software is required, in addition to a separate license to support PR. I don't believe it supports wildcard reconfiguration, though I could be mistaken.

Memory-Mapped Addressing: The DE1-SoC's internal data can be access through the USB Blaster interface. However, this requires using the SystemConsole on the host PC, so it's not a direct access.

user3666197
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wilcroft
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  • "Is this board capable of reproducing Dr. Adrian Thompsons experiment or am I in need of another?" So that's a maybe? See [The XC6200 FastMap Processor Interface](http://www-inst.eecs.berkeley.edu/~cs294-59/fa10/resources/Xilinx-history/m4ad.pdf) which describes the XC6200 family features that made it valuable to Thompson, and include a wide CPU interface providing fast configuration, random access for reconfiguration and wildcard replication. –  Jul 27 '15 at 21:42
  • The OP has asked nearly the same question three times, without elaborating on what features he/she requires. I was attempting to provide some info while also prompting the OP to do some more research. That said, maybe it should've been a comment rather than an answer. I've expanded what I wrote to hopefully address some of the features you brought up. – wilcroft Jul 27 '15 at 23:28
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    There are two reasons Xilinx might have discontinued the XC6200, the fine grain logic cells (which are required to make reconfigurable computing really work) and the patent onslaught discouraging a lot of reconfigurable computing adoption - and that's a shame, the XC6200 caught our imagination at the time. A conventional reconfiguration mechanism might be hundreds of times slower, and the lack of a fine grain architecture might require a whole new approach to describing incremental changes, which may not be realizable in the genetic sense. –  Jul 28 '15 at 01:08