generate statement with dsp48

Question

I am new to VHDL and trying to create a project where i need to use dsp block for faster calculations on big numbers (256 bits). I created this DSP48macro using coreGenerator, however I am getting a syntax error for the generate statement. Please if somebody could help me where I am going wrong.

Note: The first part is the component generated by coregen. other part is the portion where I am trying to instantiate the block. The single block is working fine. Please help or let me know if you need other info. As I am geting error in generate statement, i would appreciate of you could let me know where I am goin wrong.

A(i), B(i) are (47 downto 0) and cin, cout both 0 to 5 array to propagate carry.

Thank you.

COMPONENT hfh
PORT (

clk : IN STD_LOGIC;

carryin : IN STD_LOGIC;

c : IN STD_LOGIC_VECTOR(47 DOWNTO 0);

concat : IN STD_LOGIC_VECTOR(47 DOWNTO 0);

carryout : OUT STD_LOGIC;

p : OUT STD_LOGIC_VECTOR(47 DOWNTO 0)

);

END COMPONENT;

begin

cin(0)<= carryin;

process(clk, Signal_A , Signal_B, cin )
begin

for i in 0 to 5 generate         --error here

begin

blocks : hfh

PORT MAP (                       -- error here

clk => clk,

carryin => cin(i),

c => Signal_A(i),

concat => Signal_B(i) ,

carryout => cout(i),

p => p

);                                   -- error here

end generate;

end process;

scary_jeff · Accepted Answer · 2015-07-21T13:51:11.610

0

Your generate statement needs a label:

for i in 0 to 5 generate

should be something like:

Multipliers : for i in 0 to 5 generate

Per the comment, generate statements also cannot be inside a process.

You also have an extra begin, which you would have seen easily if you had properly indented code:

    cin(0)<= carryin;

    Multipliers : for i in 0 to 5 generate

        begin   -- Not required

        blocks : hfh
        PORT MAP (
            clk => clk,
            carryin => cin(i),
            c => Signal_A(i),
            concat => Signal_B(i) ,
            carryout => cout(i),
            p => p
        );
    end generate;

edited Jul 21 '15 at 13:51

answered Jul 21 '15 at 09:22

scary_jeff

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Generate statements are concurrent statements representing elaborated internal block statements. Concurrent statements don't belong in a process, which contains sequential statements. *process_statement_part ::= { sequential_statement }* – Jul 21 '15 at 09:34
Oh of course, how did I miss that! Answer updated, thanks. – scary_jeff Jul 21 '15 at 10:15
Hello, thank you for the answers. I may sound dumb, however, does that mean I should be using the for-generate out of the process? Dont we need the sentivity list for signifying the inputs of the overall generated block. I can sue is manually because its just 5 dsp's that I need for addition , however I need multiplication after this, so I need to use the generate statement. – rdr1234 Jul 21 '15 at 10:39
I am new here. Didn't know you actually gave me the solution. Thanks for that I would proceed from here and will be back if face any other issue. Thanks again! – rdr1234 Jul 21 '15 at 10:47

generate statement with dsp48

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