Is it possible to have paging enabled in real mode, for example during BIOS execution. If it is enabled what is the use of having paging in real mode
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Segment registers is the most similar you can get. – Ciro Santilli OurBigBook.com Oct 27 '15 at 08:20
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http://stackoverflow.com/questions/10121093/whats-the-type-of-memory-management-when-the-os-booted-paging-or-no-paging – Ciro Santilli OurBigBook.com Oct 27 '15 at 08:57
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No, From Intel Manual Vol 3A Chapter 2.5
Paging (bit 31 of CR0) — Enables paging when set; disables paging when clear. When paging is disabled, all linear addresses are treated as physical addresses. The PG flag has no effect if the PE flag (bit 0 of register CR0) is not also set; setting the PG flag when the PE flag is clear causes a general-protection exception (#GP). See also: Chapter 4, “Paging.”
(Emphasis mine)
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Thanks a lot for your answer and pointing out the reference as well, actually the reason I asked this question is in the following patent US 7568061 they mention the location of IVT, BDA and expansion ROM area as virtual space. " The page table (104) represents a map between a virtual memory address space and a physical address space", although the context of the discussion is BIOS which is running in real mode. – Arka Sharma Jul 01 '15 at 07:35
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Here is the link for this patent https://www.google.co.in/patents/US7568061?dq=prasenjit+roy&hl=en&sa=X&ei=rZWTVZX_IeS8mgXLvYnYAQ&sqi=2&pjf=1&ved=0CBwQ6AEwAA – Arka Sharma Jul 01 '15 at 07:35
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@ArkaSharma that document seem to use a lot of personal terminology. Look at this sentence *The virtual memory address space is the range of computer memory addresses addressable by a computer processor. For example, a 16-bit processor has a virtual address space that extends from zero kilobytes (‘KB’) to 64 KB, while a 32-bit computer processor can have a virtual address space that extends from zero gigabytes (‘GB’) to 4 GB.* Not very correct. Anyway this seems a revival of the old Expansion Memory thing with a custom hardware MMU and, so it is independent from the CPU. – Jul 01 '15 at 10:22