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I have the following enum declaration:

type T_STATUS is (   -- position / index
  STATUS_INIT,           -- pos = 0
  STATUS_RECONFIGURING,  -- pos = 1
  STATUS_RELOADING,      -- pos = 2
  STATUS_READY,          -- pos = 3
  STATUS_ERROR           -- pos = 4
);

Why is it not possible to use T_STATUS'length to get the count of T_STATUS members?

Example code:

constant Count : POSITIVE := T_STATUS'length;

Workaround:
It's possible to get that number by using T_STATUS'high and T_STATUS'pos as follows:

constant Count : POSITIVE := T_STATUS'pos(T_STATUS'high) + 1;

This works, because 'high gives the last enum member and 'pos converts this member into it's position in the enum list. Because the positions start at 0, one must add 1 to get the correct count/length.

Update: 'length and lots of other features have been added by me into the VHDL standard. Starting from VHDL-2019, it's now supported to get the number of elements in an enumeration type. See the IEEE Std. 1076-2019 or http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/VHDL2017 for more details and other similar changes.

Paebbels
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  • See [How to get number of elements in enumerated type](http://stackoverflow.com/questions/26081676/how-to-get-number-of-elements-in-enumerated-type). What isn't particularly clear is what knowing the number of *positions* in an enumerated type is good for, perhaps you could enlighten the reading audience. –  Jun 25 '15 at 01:47
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    @DavidKoontz: Example of use is that values of an enumerated type are sometimes transferred through a `std_logic_vector` in a generic FIFO or RAM, and the minimum length of the `std_logic_vector` then depends on the number of elements in the enumerated type. – Morten Zilmer Jun 25 '15 at 04:49
  • @DavidKoontz In some cases it's needed to pass enums through generic moduls like FIFOs, cross-clock synchronizers and so on. Or it's needed to connect enums to integrated logic anaslyzers like ChipScope. All these cases need a - I would call it - serialisation method to std_logic_vector, which needs to know how many bits are required. One could also discuss if enums should have a `'serialize` attribute :). OK, sun is up and I'll edit the twiki page .. – Paebbels Jun 25 '15 at 06:26
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    I'd rather be able to have generic types as port definition. If you would define a memory of T_STATUS, the tool would encode/decode it as it pleases, same with records and such. However, a custom FIFO entity only accepts std_logic_vector as input/output. I would love to use the same module as a FIFO of T_STATUS or what not. Right now I use to_std_logic_vector/to_t_status function to deal with it... – Jonathan Drolet Jun 25 '15 at 18:26
  • [Jan Decaluwe](http://stackoverflow.com/a/5203754/1155120) indirectly pointed out the fundamental flaw in dealing with integers. VHDL has no requirement that integers be implemented as Two's Compliment values or that they are based on binary arithmetic at all. That the difference in bounds implies something to you in a binary representation doesn't affect that it means nothing to integers based on a decimal ALU (early versions of Ada with an early VHDL preprocessor on big iron). This is a formal notation issue, where binary numbers aren't defined. –  Jun 26 '15 at 02:34
  • @David Koontz Not concerned about integer'left in this case as integer'length would be outside of an integer type. The only time 'length would make sense on an integer object is when it has constraints that are representable as an integer value. – Jim Lewis Jun 26 '15 at 16:50
  • VHDL-2019 has been approved in late 2019. The requested feature has been added by me and was approved. See the IEEE Std. 1076-2019 or http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/VHDL2017 for more details and other similar changes. – Paebbels Jul 29 '21 at 05:42

2 Answers2

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@Paebbels

No one requested this for any of the previous revisions. By the way, the working group needs additional experienced users, such as yourself to participate. This will help ensure we get relevant work done for the next revision.

This request is captured here: http://www.eda.org/twiki/bin/view.cgi/P1076/EnumAttributes

Our twiki starts here: http://www.eda.org/twiki/bin/view.cgi/P1076/

Current proposals are here: http://www.eda.org/twiki/bin/view.cgi/P1076/CollectedRequirements

Meeting information is here: http://www.eda.org/twiki/bin/view.cgi/P1076/MeetingMinutes

IEEE 1076 is an individual based working group and encourages participation of the VHDL community. There are no special membership requirements to participate. Help shape the next revision, join us.

Jim Lewis 1076 WG Chair

Jim Lewis
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  • I'll update the EnumAttributes page and add my use cases in the 'use models' section. Is this the intedend way? I'm using this construct to serialize / deserislize enums into strings or std_logic_vectors and vice versa. If a synthesis tool supports file I/O it's a great help in debugging :). Because other tools can read back the exported information. – Paebbels Jun 24 '15 at 18:30
  • For serialising into strings I'd just use `'image` and `'value`. But that doesn't help with std_logic_vector, though `'enum_encoding` might. –  Jun 24 '15 at 19:06
  • @briandrummond Oh sorry, my comment was a bit short. For serializing to string I'm using 'image, too. 'value is not supported by all tools. My workaround is a loop to test all 'image results until it matches :). – Paebbels Jun 24 '15 at 20:35
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A little more to the point, an enumerated type is a scalar type not an array type.

'LENGTH is specified in IEEE Std 1076-2008 16.2.3 Predefined attributes of arrays.

And from 5.2.2 Enumeration types, 5.2.2.1 General, para 5:

Each enumeration literal yields a different enumeration value. The predefined order relations between enumeration values follow the order of corresponding position numbers. The position number of the value of the first listed enumeration literal is zero; the position number for each additional enumeration literal is one more than that of its predecessor in the list.

we see that each enumeration literal represents a position number based on it's declaration order and the first value has a position number of zero (the basis for your 'workaround').

All this comes about because VHDL is a formal notation. Length doesn't describe a range of values it describes the number of elements in an array.

  • Ok, length is a good attribute name for an array size. What about `'count` for the enum size? I think we should move this discussion to the VHDL mailinglist :). – Paebbels Jun 24 '15 at 21:29
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    David's comment is that 1076 currently uses 'LENGTH only for arrays. This does not preclude the 1076 WG from extending its meaning. I think we need to use what comes natural to the user community. If that is COUNT, I am ok with it, but like @Paebbels, when I tried to use it, I naturally thought why not extend 'LENGTH. – Jim Lewis Jun 26 '15 at 16:59