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I am trying to convolve a 16-bit input data stream with a Dirac Delta on a Xilinx Virtex 7.

More specifically, instead of multiplying my input stream by a cosine in the time domain, I would like to convolve it with the following expression in the frequency domain: F(f) = 0.5 * (delta(f - f0) + delta(f + f0))

Does anybody have any idea about how to implement that ? Indeed, the only possibly interesting Xilinx IP core for my problem is the FIR Complier but I don't know how to represent my function F(f) as the 'coefficient' input of this IP core.

EDIT: mathematically, since the target convolution involves only Dirac Deltas, there may exist a shorter way to avoid the convolution by simply evaluating the input function at the point f0. But I have no idea about how to implement that neither ..

Thank you in advance

asonnino
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  • I've got to ask why? Multiplication is much simpler than convolution to execute on fpga or any other device, even with dirac delta. – Jonathan Drolet May 25 '15 at 14:50
  • Actually my project is about the implementation of a QAM modulator in frequency domain. The advantage of this procedure is that filtering is much simpler in frequency domain than in time domain and therefore I hope that my modulator will especially be faster than a standard time-domain modulator. – asonnino May 25 '15 at 16:48
  • The multiplication by cosine is simpler in time domain. Filtering costs less operations in frequency, but is much more complicated, especially on FPGA as you have to FFT, multiply, IFFT while keeping track of your boundaries for proper convolution. Furthermore, FPGAs are optimised to perform convolution in time-domain with multiply-accumulate DSPs, so it's usually better to go that way. It may not be algorithmically optimal, but it's resource optimal! – Jonathan Drolet May 25 '15 at 16:56
  • Thank you for your answer. I understand the idea of resource optimum .. That means my modulator will not be faster but I still have to complete my project... I already have a modulator implemented in time domain and the next step of the project is the comparison with one implemented in frequency domain. Then I will have to compare and discuss the two solutions. – asonnino May 25 '15 at 17:03
  • Isn't the convolution with a dirac delta just a shift by `+/- f0`? – mbschenkel May 26 '15 at 06:02
  • Yes mbschenkel, or at least it's what I think .. Then should I simply shift the index of my frequency-domain stream ? – asonnino May 26 '15 at 10:32

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Xilinx has an IP to perform Fast Fourier Transform on the FPGA. Once in frequency domain, you are somewhat on your own to perform your operations. You could use the FIR ip core, but since your function is quite simple it would waste a lot of resources compared to a custom implementation. Finally, the Xilinx's core can do inverse FFT to go back to time-domain.

AFAIK, there is no core to help perform convolution in frequency domain. So don't forget to overlap-add your transforms to do the proper calculation. Matlab will be your friend there!

Finally, you may be interested in Number Theoretic Transform (NTT). The algorithm is more efficient than FFT for FPGA and can be used to perform convolution. The drawback is that there are limitations to the length of the transform you can have and that the "frequency-domain coefficient" are totally unrelated to frequency (they are somewhat random). If all you want if fast-convolution, NTT is for you, if you're looking for other uses for these fourier-coefficient, it's not. However, the NTT expression of the cosine would be much more complicated and would defeat the purpose of your work, but I thought you may be interested on an academic standpoint. As I stated in my comment, multiplying with a cosine is simpler in time-domain after all.

Jonathan Drolet
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  • Thank you for your answer. That will give me the direction of where to start to solve my problem. As you advised, I will look deeper in the NTT algorithm. – asonnino May 26 '15 at 10:29